Method for fabricating semiconductor device
AssigneeHynix Semiconductor Inc.
InventorMyung-Kyu Ahn
Life of this patent
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Abstract
A method for fabricating a semiconductor device capable of preventing an electric short between lower electrodes caused by leaning lower electrodes, or lifted lower electrodes and of securing a sufficient capacitance of a capacitor by increasing an effective capacitor area. The method includes the steps of: preparing a semi-finished semiconductor substrate; forming a sacrificial layer on the semi-finished semiconductor substrate; patterning the sacrificial layer by using an island-type photoresist pattern, thereby obtaining at least one contact hole to expose portions of the semi-finished semiconductor substrate; and forming a conductive layer on the sacrificial layer.
Claims13
A method for fabricating a semiconductor device, comprising the steps of:
- forming a plurality of plugs electrically connected to a substrate by passing through an inter-layer insulation layer;
- forming an etch stop layer on the inter-layer insulation layer and the plugs;
- forming a sacrificial layer on the substrate;
- patterning the sacrificial layer by using an island-type photoresist pattern, thereby obtaining at least one contact hole to expose portions of the inter-layer insulation layer;
- and
- forming a conductive layer on the sacrificial layer.
A method for fabricating a semiconductor device, comprising the steps of:
- forming a plurality of plugs electrically connected to a substrate by passing through an inter-layer insulation layer;
- forming a conductive etch stop layer on the inter-layer insulation layer and the plugs;
- forming a sacrificial insulation layer on the etch stop layer;
- forming an island-type photoresist pattern on the layer;
- etching the sacrificial insulation layer with use of the photoresist pattern as an etch mask to expose predetermined portions of the etch stop layer;
- removing the exposed portions of the etch stop layer to expose portions of the inter-layer insulation layer;
- removing the photoresist pattern;
- forming a conductive layer on the sacrificial insulation layer and a remaining portion of the etch stop layer;
- planarizing the conductive layer until the sacrificial insulation layer is exposed;
- removing the sacrificial insulation layer;
- and
- forming lower electrodes by removing the conductive layer disposed on the inter-layer insulation layer.
Dependencies are inferred from the claim text.