US 7,024,653 B1 · Architecture for efficient implementation of serial data communication functions on a programmable logic device (PLD)

Abstract

According to one embodiment, an integrated circuit (100) includes a programmable portion (102) and a communication portion (104). A programmable portion (102) may include logic circuits that are configurable by a user. A communication portion (104) may include one or more circuit blocks designed to perform predetermined serial data communication functions. According to one embodiment, a communication portion (104) may include a block converter (218) that can encode/decode input data words into output data words, and a scrambler circuit (220) for scrambling/de-scrambling data according to a predetermined scrambling polynomial value. Different scrambling polynomial values may be selected from an operation control store (206) to provide a variety of different scrambling/de-scrambling functions. The inclusion of a communication portion (104) may reduce the size and/or increase the speed of an integrated circuit over conventional approaches that may synthesize serial data communication functions from programmable logic circuits.

Claims15

Dependent claims

An integrated circuit device, comprising:

a programmable portion comprising a plurality of circuits configurable by a user of the integrated circuit device;
and
at least one communication portion comprising:
a plurality of data operation circuits, each of which performs a different function on received input data, including at least one circuit block manufactured to perform a predetermined data communication function including converting received first data values into second data values, the at least one circuit including a block converter circuit that converts an input data word into an output data word having different bit values than the input data word in response to a user selectable operational value, and
an operation control store that provides the user selectable operational value from a plurality of operational values to the at least one circuit to control the type of operation performed on the received data;
and
a memory circuit for storing configuration information for configuring circuits of the programmable portion.

4 more elements

Dependencies are inferred from the claim text.

Architecture for efficient implementation of serial data communication functions on a programmable logic device (PLD)

Life of this patent

Architecture for efficient implementation of serial data communication functions on a programmable logic device (PLD)

Life of this patent

Abstract

Claims15