Electrostatic discharge simulation
AssigneeLattice Semiconductor Corporation
InventorsStewart Logie, Farrokh Kia Omid-Zohoor, Nui Chong
Life of this patent
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Abstract
Systems and methods provide electrostatic discharge simulation techniques. For example, a method in accordance with an embodiment of the present invention provides a simulation of electrostatic discharge in integrated circuits. The method may allow for the design of protection circuits and simulating electrostatic discharge events concurrently with the design of the associated electrical circuit.
Claims22
A method of determining an electrostatic discharge protection for a circuit, the method comprising:
- entering the circuit into a circuit simulation program;
- representing a circuit element of the circuit in the circuit simulation program by its behavior under electrostatic discharge conditions based on testing of a physical form of the circuit element to determine its behavior and a failure criteria under electrostatic discharge conditions;
- running the circuit simulation program to obtain simulation results, wherein the circuit simulation program provides an electrostatic discharge stimulus to the circuit;
- and
- comparing the simulation results to a failure criteria for the circuit.
A computer readable medium storing a circuit simulation program comprising:
- symbols for representing a behavior of corresponding circuit elements under normal operating conditions;
- and
- symbols for representing a behavior of the corresponding circuit elements under electrostatic discharge conditions, which correspond to macros which provide a general behavior of the corresponding circuit elements based on electrostatic discharge testing of the circuit elements.
A method of testing a circuit for an electrostatic discharge protection, the method comprising:
- providing a circuit simulation program to simulate the circuit;
- and
- providing macros within the circuit simulation program which represent a behavior of corresponding circuit elements under electrostatic discharge conditions.
A method of generating circuit element macros for simulating an electrostatic discharge behavior, the method comprising:
- testing a physical circuit element to determine its behavior and a failure criteria under electrostatic discharge conditions;
- and
- creating an associated macro for the physical circuit element representing the determined electrostatic discharge behavior, the macro suitable for use in a circuit simulation program.
Dependencies are inferred from the claim text.