Method for predicting performance of integrated circuit and method for designing the circuit
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorTakashi Sumikawa
Life of this patent
Estimating the term…
Abstract
From a trend for performance correlation coefficients (M1, M2) between circuits of the same type and of different process generations, a performance correlation coefficient M between a current generation circuit and a next generation circuit is predicted, and from a trend for performance correlation coefficients (R1, R2, R3) between circuits of the same process generation and of different types, a performance correlation coefficient R between different types of circuits in accordance with a next generation process is predicted. Thus, based on known performance of a circuit A, performances of a next generation circuits AA and BB are predicted using the predicted performance correlation coefficients M and R.
Claims6
A method for predicting performance of an integrated circuit in an early stage of development, comprising:
- a first step of obtaining performance of a first circuit, and obtaining performance of a second circuit which is a different circuit from the first circuit, the first and the second circuits being made by an existing generation process;
- a second step of obtaining a performance correlation coefficient between the first circuit and the second circuit;
- and
- using a predicted value or a target value for performance of a third circuit which is the same type as the first circuit and made by a next generation process, and the performance correlation coefficient obtained in the second step, a third step of predicting performance of a fourth circuit which is the same type as the second circuit and made by the next generation process,
- wherein at least one of delay time, power consumption and chip area of each of the circuits is used as the performance.
Dependencies are inferred from the claim text.