Program logic device for synchronous operation with multiple clock signals

Abstract

An object of the present invention is to provide a programmable logic device capable of exchanging information with a logic constitution connected to a control processor and operating synchronously with a standard clock. The present invention comprises a control processor operating according to a high speed clock obtained by multiplying a standard clock, an input unit for inputting signal information into the control processor, and an output unit for outputting the signal information of the control processor as a signal, and characterized in that while the control processor is executing a plurality of processings according to the high speed clock, control is determined according to a value of the signal captured by the input unit synchronously with the standard clock within one cycle and a value of the output unit is changed by the control.

Dependencies are inferred from the claim text.