System and method of reducing the number of copies from alias registers to real registers in the commitment of instructions

A processor system comprising:

• a reorder buffer comprising a plurality of entries associated respectively with a plurality of instructions;
• an allocator to:
• allocate one of said reorder buffer entries for an incoming instruction, said allocated reorder buffer entry includes an alias register associated with a prior instruction,
• determine whether said incoming instruction designates a real register, and
• modify said allocated reorder buffer entry to include said incoming instruction with said alias register associated with said prior instruction if it is determined that said incoming instruction does not designate said real register;
• and
• a retirement unit to determine whether to cause the copying of said alias register to said real register after execution of said incoming instruction by (i) determining whether said alias register contains valid data, (ii) determining whether said alias register stores a value identical to a value associated with a new alias register allocated to said reorder buffer entry, and (iii) copying content of said alias register to said real register if said alias register does not have the same value as the new alias register allocated to said reorder buffer entry.

A method comprising:

• providing a reorder buffer comprising a plurality of entries associated respectively with a plurality of instructions;
• allocating one of said reorder buffer entries for an incoming instruction, wherein said allocated reorder butter entry includes an alias register associated with a prior instruction;
• modifying said allocated reorder buffer entry to include said incoming instruction;
• executing said incoming instruction which generates an alias register value;
• and
• determining whether to copy said alias register to a real register after the execution of said incoming instruction, comprising (i) determining whether said alias register contains valid data, (ii) if said alias register contains valid data, determining whether said alias register has a same value as a new alias register allocated to said reorder buffer entry, and (iii) copying content of said alias register to said real register if said alias register does not have the same value as said new alias register allocated to said reorder buffer entry.

A processor system comprising:

• a reorder buffer comprising a plurality of entries associated respectively with a plurality of instructions;
• an allocator to (i) allocate one of said reorder buffer entries for an incoming instruction, said allocated reorder buffer entry includes an alias register associated with a prior instruction, and (ii) modify said allocated reorder buffer entry to include said incoming instruction;
• an execution unit to execute said incoming instruction which generates a real register value;
• and
• a retirement unit to determine whether to cause the copying of said alias register to a real register after the execution of said incoming instruction by (i) determining whether said alias register contains valid data, (ii) if said alias register contains valid data, determining whether said alias register has a same value as a new alias register allocated to the reorder buffer entry, and (iii) copying content of said alias register to said real register if said alias register does not have the same value as the new alias register allocated to the reorder buffer entry.

A retirement unit, coupled to a reorder buffer including a plurality of reorder buffer entries associated with a plurality of instructions, to determine whether to cause copying of an alias register to a real register after execution of an incoming instruction, comprising:

• means for determining whether said alias register contains valid data;
• means for determining whether said alias register has a same value as a new alias register allocated to a first reorder buffer entry of the plurality of reorder buffer entries if said alias register contains the valid data;
• and
• means for copying content of said alias register to said real register if said alias register does not have the same value as the new alias register allocated to the first reorder buffer entry.