Translation look-aside buffer for improving performance and reducing power consumption of a memory and memory management method using the same

A fully-associative TLB for converting a virtual address having a virtual page number and an offset, into a physical address having a physical page number and the offset, the TLB comprising:

• a first TLB having a first bank and a second bank, wherein the first bank or the second bank has a plurality of entries, each of the plurality of entries having one virtual page number and one physical page number;
• a second TLB having a plurality of entries, each of the plurality of entries having one virtual page number and four physical page numbers;
• and
• a selection circuit which, in response to a selection signal, outputs an output signal of the first TLB to the second TLB, and if three physical page numbers among the four page numbers are sent from the first TLB, the three physical page numbers are nullified in the respective entries of the first TLB.

A fully-associative translation look-aside buffer (TLB) for converting a virtual address into a physical address, the TLB comprising:

• a first fully-associative TLB having a plurality of banks, each of the plurality of banks having a plurality of entries, each of the plurality of entries having a first page size and indicating the first page;
• and
• a second fully-associative TLB having a plurality of entries, each of the plurality of entries having a second page size and indicating the second page,
• wherein one entry indicating the second page size has mapping information on a virtual page number to which access failed, and mapping information on a plurality of virtual page numbers succeeding to the virtual page number.

A memory management method using a translation look-aside buffer (TLB), the method comprising:

• accessing a first fully-associative TLB having a plurality of banks, each of the plurality of banks having a plurality of entries, each entry having one virtual page number and one physical page number, and a second TLB having a plurality of entries, each entry having one virtual page number and a plurality of physical page numbers;
• if a miss for a first virtual page number occurs in the first TLB and in the second TLB, accessing the first TLB to determine whether or not a predetermined number of virtual page numbers adjacent to the first virtual page number exist in the first TLB, while the miss for the first virtual page number is processed;
• if the predetermined number of virtual page numbers adjacent to the first virtual page number exist in the first TLB, sending physical page numbers corresponding to the predetermined number of respective virtual page numbers adjacent to the first virtual page number, to the second TLB;
• and
• generating a new entry of the second TLB containing a physical page number corresponding to the first virtual page number to which access failed, and physical page numbers corresponding to the predetermined number of respective virtual page numbers adjacent to the first virtual page number, and outputting the physical page number corresponding to the first virtual page number.