System and method for testing parameterized logic cores
AssigneeXilinx, Inc.
InventorsReto Stamm, Mary O'Connor, Christophe Brotelande
Life of this patent
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Abstract
A system and method for testing a parameterizable logic core are provided in various embodiments. A test controller is configured and arranged to generate a set of random parameter values for the logic core. A netlist is created from the parameterized logic core, and circuit behavior is simulated using the netlist. In other embodiments, selected parameter values are optionally weighted to increase the probability of generating those values, and the parameter set is cloned and mutated when simulation fails.
Claims17
A computer-implemented method for testing a parameterizable logic core, comprising:
- randomly generating a set of parameter values for the logic core;
- generating a netlist from the set of parameter values and logic core;
- simulating circuit behavior with the netlist;
- cloning the set of parameter values;
- mutating the set of parameter values, whereby a mutated set of parameter values is produced;
- generating a new netlist from the mutated set of parameter values and logic core;
- and
- simulating circuit behavior with the new netlist.
A system for testing a parameterizable logic core, comprising:
- a test controller configured and arranged to randomly generate a set of parameter values for the logic core;
- a core generator coupled to the test controller, the core generator configured and arranged to generate a netlist from the logic core and set of parameter values;
- a simulator coupled to the test controller, the simulator configured and arranged to simulating circuit behavior with the netlist and a predetermined test bench;
- wherein the test controller is further configured to clone the set of parameter values and mutate the set of parameter values, whereby a mutated set of parameter values is produced, the core generator is configured to generate a new netlist from the mutated set of parameter values and logic core, and the simulator is configured to simulate circuit behavior with the new netlist.
A system for testing a parameterizable logic core, comprising:
- a test controller including a GUI-driver, the GUI-driver configured and arranged to randomly generate a set of parameter values for the logic core;
- a core generator including a GUI coupled to the GUI-driver, the core generator configured and arranged to generate a netlist from the logic core and set of parameter values;
- a simulator coupled to the test controller, the simulator configured and arranged to simulating circuit behavior with the netlist and a predetermined test bench;
- wherein the GUI-driver is further configured to clone the set of parameter values and mutate the set of parameter values, whereby a mutated set of parameter values is produced, the core generator is configured to generate a new netlist from the mutated set of parameter values and logic core, and the simulator is configured to simulate circuit behavior with the new netlist.
An apparatus for testing a parameterizable logic core, comprising:
- means for randomly generating a set of parameter values for the logic core;
- means for generating a netlist from the set of parameter values and logic core;
- and
- means for simulating circuit behavior with the netlist;
- means for cloning the set of parameter values;
- means for mutating the set of parameter values, whereby a mutated set of parameter values is produced;
- means for generating a new netlist from the mutated set of parameter values and logic core;
- and
- means for simulating circuit behavior with the new netlist.
Dependencies are inferred from the claim text.