Ultrahigh-speed clock extraction circuit

An ultrahigh-speed clock extraction circuit for obtaining a local clock synchronized in bit phase with an input optical signal pulse stream, said extraction circuit comprising:

• a local clock generating part which generates a local clock of a frequency controlled by a voltage control signal and branches the local clock into a local output clock and a local feedback clock;
• a local feedback signal generating part which generates a local feedback signal from said local feedback clock;
• an input signal component generating part made up of a modulation signal generating part for generating a modulation signal containing phase information of said local feedback signal, an optical modulator for modulating an input optical signal pulse stream by said modulation signal to generate a modulated input optical signal stream, and a photodetector supplied with said modulated input optical signal pulse stream, for outputting an input signal component electrical signal having a down-converted frequency of said modulated input optical signal pulse stream and having bit-phase information thereof;
• a phase comparison part which compares the phases of said local feedback signal and said input signal component electrical signal and outputs, as said voltage control signal, the voltage corresponding to their phase difference;
• and
• ratio setting means which sets the frequency of said local feedback signal to an integral fraction of the frequency of said output local clock so that said down-converted frequency of said input signal component electrical signal differs from a natural-number multiple of the frequency of said modulation signal;
• wherein a path containing said phase comparison part, said local clock generating part and said local feedback signal generating part constitutes a phase-locked loop for said input signal component electrical signal.