Method and apparatus for digital signal processing
AssigneeSony Corporation
InventorsMasashi Nakamura, Hisayoshi Moriwaki, Sunao Furui, Ichiro Hamada
Life of this patent
Estimating the term…
Abstract
Elements necessary for a digital television receiver are structured as a plurality of digital signal processing blocks and a host arithmetic operation processing block. The blocks are connected through a general purpose bus. Commands for controlling operations of the blocks and data of a stream are transferred through the bus. When an encryption encoder/decode is disposed in each block, contents transferred through the bus can be protected. When an encryption encoder/decode circuit is disposed in an interface to which an extension plug-in card is attached, contents that are output from the interface can be protected.
Claims18
A digital signal processing apparatus, comprising:
- a plurality of digital signal processing blocks and a host arithmetic operation processing block as functions necessary for processing a digital signal;
- a common bus for connecting said host arithmetic operation processing block and said plurality of digital signal processing blocks;
- interface means coupled to said common bus to enable a block to be added to the common bus or to enable a block connected to the common bus to be changed;
- and
- means for encrypting data of a stream transferred through said common bus.
A digital signal processing apparatus, comprising:
- a plurality of digital signal processing blocks and a host arithmetic operation processing block as functions necessary for processing a digital signal;
- a common bus for connecting said host arithmetic operation processing block and said plurality of digital signal processing blocks;
- interface means coupled to said common bus to enable a block to be added to said common bus or to enable a block connected to said common bus to be changed;
- and
- means for encrypting the data of the stream that is output through said interface of the extension function providing medium when the data of the stream is transferred to the extension providing medium through said common bus.
A digital signal processing method, comprising the steps of:
- structuring functions necessary for processing a digital signal as a plurality of digital signal processing blocks and a host arithmetic operation processing block;
- connecting the host arithmetic operation processing block and the plurality of digital signal processing blocks through a common bus;
- providing a means coupled to said common bus to enable a block to be added to said common bus or to enable a block connected to said common bus to be changed;
- and
- encrypting data of a stream transferred through the common bus.
A digital signal processing method, comprising the steps of:
- structuring functions necessary for processing a digital signal as a plurality of digital signal processing blocks and a host arithmetic operation processing block;
- connecting the host arithmetic operation processing block and the plurality of digital signal processing blocks through a common bus;
- providing a means coupled to said common bus to enable a block to be added to said common bus or to enable a block connected to said common bus to be changed;
- and
- encrypting the data of the stream that is output through the interface of the extension function providing medium when the data of the stream is transferred to the extension function providing medium through the common bus.
Dependencies are inferred from the claim text.