Apparatus and method for scalable offline CDMA demodulation

A CDMA demodulator, comprising:

• a finger timing unit for generating signals indicating cycle boundaries for a plurality of fingers;
• an offline processing unit for receiving and storing samples and processing symbols from the stored samples for the plurality of fingers in response to the cycle boundary signals;
• and
• an engine for symbol demodulating and combining high rate symbols corresponding to the plurality of fingers.

A CDMA demodulator, comprising:

• a memory for storing samples according to a memory address;
• a finger timing unit for producing a time reference for each of a plurality of fingers and producing a plurality of processing cycle boundary signals therefrom;
• a register for storing the memory address in response to a processing cycle boundary signal;
• and
• a sample processor for processing samples from the memory identified in accordance with the stored memory address, the sample processing initiated in response to the cycle boundary signal, wherein the finger timing unit comprises a plurality of counters for producing the time reference for each of the plurality of fingers.

A CDMA demodulator, comprising:

• a memory for storing samples according to a memory address;
• a finger timing unit for producing a time reference for each of a plurality of fingers and producing a plurality of processing cycle boundary signals therefrom;
• a register for storing the memory address in response to a processing cycle boundary signal;
• and
• a sample processor for processing samples from the memory identified in accordance with the stored memory address, wherein the location of samples in the memory for processing in the sample processor is computed by subtracting the processing cycle length from the stored memory address.

A CDMA demodulator, comprising:

• a memory for storing samples according to a memory address;
• a finger timing unit for producing a time reference for each of a plurality of fingers and producing a plurality of processing cycle boundary signals therefrom, wherein the finger timing unit comprises a single counter and a plurality of masks for producing the time reference for each of the plurality of fingers;
• a register for storing the memory address in response to a processing cycle boundary signal;
• and
• a sample processor for processing samples from the memory identified in accordance with the stored memory address.

A CDMA demodulator, comprising:

• a memory for storing samples according to a memory address;
• a finger timing unit for producing a time reference for each of a plurality of fingers and producing a plurality of processing cycle boundary signals therefrom;
• a register for storing the memory address in response to a processing cycle boundary signal;
• and
• a sample processor for processing samples from the memory identified in accordance with the stored memory address,
• wherein the sample processor comprises:
• a pseudo-random noise (PN) generator for generating PN values;
• and
• a despreader for despreading the samples with the PN values to produce despread samples.

A CDMA demodulator, comprising:

• a memory for storing samples according to a memory address;
• a finger timing unit for producing a time reference for each of a plurality of fingers and producing a plurality of processing cycle boundary signals therefrom;
• a register for storing the memory address in response to a processing cycle boundary signal;
• a sample processor for processing samples from the memory identified in accordance with the stored memory address;
• and
• an interrupt controller for arbitrating between the plurality of processing cycle boundary signals.

A CDMA demodulator, comprising:

• a memory for storing samples according to a memory address;
• a finger timing unit for producing a time reference for each of a plurality of fingers and producing a plurality of processing cycle boundary signals therefrom;
• a register for storing the memory address in response to a processing cycle boundary signal;
• a sample processor for processing samples from the memory identified in accordance with the stored memory address;
• and
• a DSP for processing and combining the results of the sample processor.

A method of CDMA demodulation, comprising:

• storing received I and Q samples in a memory according to a memory address;
• producing a time reference for a plurality of fingers;
• generating interrupts on processing cycle boundaries according to the plurality of time references;
• processing stored samples using an offline processing unit;
• latching the memory address upon generating an interrupt;
• and accessing the stored samples for processing using an address generated from the latched memory address.

A method of CDMA demodulation, comprising:

• storing received I and Q samples in a memory according to a memory address;
• producing a time reference for a plurality of fingers;
• generating interrupts on processing cycle boundaries according to the plurality of time references;
• processing stored samples using an offline processing unit;
• and
• arbitrating between simultaneous assertions of interrupts corresponding to one or more of the plurality of time references.

A method of CDMA demodulation, comprising:

• storing received I and Q samples in a memory according to a memory address;
• producing a time reference for a plurality of fingers;
• generating interrupts on processing cycle boundaries according to the plurality of time references;
• processing stored samples using an offline processing unit;
• and
• symbol demodulation and combining of the results of the offline processing unit in a DSP.