Nonvolatile semiconductor memory device and writing method thereto

A nonvolatile semiconductor memory device comprising:

• a plurality of word lines;
• a plurality of bit lines;
• a memory cell array including memory cells arranged in a matrix shape at the intersections of the plurality of word lines and the plurality of bit lines;
• a write circuit arranged per a bit line or a plurality of bit lines in order to perform batch write operation to a page including the plurality of memory cells, the write circuit comprising a serial connection latch group where a plurality of latch circuits are connected serially to store data written to a plurality of pages, and a bit line connection circuit for connecting the latch circuit in the final stage of the serial connection latch group and bit lines;
• a voltage generating circuit for generating a voltage necessary for write operation;
• a latch data transfer control circuit for transferring latch data in each circuit of the serial connection latch group in a ring shape by transferring latch data in each latch circuit of the serial connection latch group to the latch circuit in the next stage and transferring latch data in the latch circuit in the final stage to the latch circuit in the first stage;
• and
• a control circuit for performing write operation to a plurality of pages by repeating continuous program operation on a plurality of pages which transfers in a ring shape the data written to a plurality of pages stored in the plurality of latch circuits while continuously operating the voltage generating circuit to cause the circuit to continuously generate a voltage necessary for program operation thereby continuously performing program operation on a plurality of pages, and continuous verify operation on a plurality of pages which transfers in a ring shape the data written to a plurality of pages stored in the plurality of latch circuits while continuously operating the voltage generating circuit to cause the circuit to continuously generate a voltage necessary for verify operation thereby continuously performing verify operation on a plurality of pages.

A method of writing to a nonvolatile semiconductor memory device comprising:

• a plurality of word lines;
• a plurality of bit lines;
• a memory cell array including memory cells arranged in a matrix shape at the intersections of said plurality of word lines and said plurality of bit lines;
• a write circuit arranged per a bit line or a plurality of bit lines, said write circuit comprising a plurality of latch circuits for storing data written to a plurality of pages, and a bit line connection circuit for connecting said plurality of latch circuits and bit lines in order to perform batch write operation to a page including said plurality of memory cells;
• and a voltage generating circuit for generating a voltage necessary for write operation;
• wherein said method performs the following operations:
• a continuous program operation on a plurality of pages which sequentially selects data written to a plurality of pages stored in said plurality of latch circuits while continuously operating said voltage generating circuit to cause the circuit to continuously generate a voltage necessary for program operation thereby continuously performing program operation on a plurality of pages;
• a continuous verify operation on a plurality of pages which sequentially selects data written to a plurality of pages stored in said plurality of latch circuits while continuously operating said voltage generating circuit to cause the circuit to continuously generate a voltage necessary for verify operation thereby continuously performing verify operation on a plurality of pages;
• and
• repeating the continuous program operation and the continuous verify operation to thereby perform a write operation to a plurality of pages.

A method of writing to a nonvolatile semiconductor memory device comprising:

• a plurality of word lines;
• a plurality of bit lines;
• a memory cell array including memory cells arranged in a matrix shape at the intersections of said plurality of word lines and said plurality of bit lines;
• a write circuit arranged per a bit line or a plurality of bit lines in order to perform batch write operation to a page including said plurality of memory cells, said write circuit comprising a serial connection latch group where a plurality of latch circuits are connected serially to store data written to a plurality of pages, and a bit line connection circuit for connecting the latch circuit in the final stage of said serial connection latch group and bit lines;
• a latch data transfer control circuit for transferring latch data in each circuit of said serial connection latch group in a ring shape by transferring latch data in each latch circuit of said serial connection latch group to the latch circuit in the next stage and transferring latch data in the latch circuit in the final stage to the latch circuit in the first stage;
• and a voltage generating circuit for generating a voltage necessary for write operation;
• wherein said method performs the following operations:
• a continuous program operation on a plurality of pages which transfers in a ring shape the data written to a plurality of pages stored in said plurality of latch circuits while continuously operating said voltage generating circuit to cause the circuit to continuously generate a voltage necessary for program operation thereby continuously performing program operation on a plurality of pages;
• a continuous verify operation on a plurality of pages which transfers in a ring shape the data written to a plurality of pages stored in said plurality of latch circuits while continuously operating said voltage generating circuit to cause the circuit to continuously generate a voltage necessary for verify operation thereby continuously performing verify operation on a plurality of pages;
• and
• repeating the continuous program operation and the continuous verify operation to thereby perform a write operation to a plurality of pages.