US 7,023,726 B1Granted

Hybrid magnetoresistive random access memory (MRAM) architecture

AssigneeIndustrial Technology Research Institute

InventorsKuo-Lung Chen, Ming-Jer Kao, Ming-Jin Tsai

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Abstract

The present invention relates to a hybrid MRAM architecture, and more particularly to a hybrid MRAM architecture capable of being used with an MCU and an MPU. This hybrid MRAM architecture is adapted to a controlling device for accessing a bit of information, comprising a plurality of first MRAM arrays (1T1MTJ architecture), a plurality of second MRAM arrays (XPC architecture), an address line, an access decoder, a sensing and writing circuit, and at least one I/O bus. The access decoder accesses to the bit of information from either the first or the second MRAM arrays selected in accordance with an address signal from the controlling device. The sensing and writing circuit amplifies the bit of information and transmits it to the controlling device via the at least one I/O bus. Accordingly, the access of the bit of information is completed.

Claims7

Dependent claims

A hybrid MRAM architecture adapted to a controlling device for accessing the specific bit of information, comprising:

a plurality of first MRAM arrays composed of a plurality of MRAM cells each of which has a 1T1MTJ architecture;
a plurality of second MRAM arrays composed of a plurality of MRAM cells each of which has an XPC architecture;
an address line for transmitting an address signal from said controlling device;
an access decoder for respectively connecting to said first MRAM arrays, said second MRAM arrays and said address line, in which said specific bit of information is accessed from either said first MRAM arrays or said second MRAM arrays selected in accordance with said address signal transmitted by said address line;
a sensing and writing circuit connected to said access decoder to amplify said specific bit of information read from said access decoder;
and
at least one I/O bus connected to said sensing and writing circuit to transmit said specific bit of information to said controlling device.

4 more elements

Dependencies are inferred from the claim text.