Low pass filter

A low pass filter comprising:

• a differential amplifier comprising a positive input end, a negative input end, a positive output end and a negative output end;
• a first resistive device coupled between the negative input end and a first node;
• a second resistive device coupled between the positive input end and the first node;
• a third resistive device substantially the same as the second resistive device coupled between the negative input end and a second node;
• a fourth resistive device substantially the same as the first resistive device coupled between the positive input end and the second node;
• a first capacitive device coupled between the negative input end and the positive output end;
• a second capacitive device substantially the same as the first capacitive device coupled between the positive input end and the negative output end.
• wherein the first resistive device, the second resistive device, the third resistive device, and the fourth resistive device are adjustable impedance circuits respectively comprising:
• a first impedance having a first impedance value;
• a first switch device coupled to the first impedance;
• a second impedance having a second impedance value;
• and
• a second switch device coupled to the second impedance, wherein by controlling the switching time of the first switch device and the second switch device, the equivalent impedance of the adjustable impedance circuit can be determined by the first impedance value and the second impedance value.

A low pass filter comprising:

• a differential amplifier comprising a positive input end, a negative input end, a positive output end and a negative output end;
• a first resistive device coupled between the negative input end and a first node;
• a second resistive device coupled between the positive input end and the first node;
• a third resistive device substantially the same as the second resistive device coupled between the negative input end and a second node;
• a fourth resistive device substantially the same as the first resistive device coupled between the positive input end and the second node;
• a first capacitive device coupled between the negative input end and the positive output end;
• a second capacitive device substantially the same as the first capacitive device coupled between the positive input end and the negative output end;
• a fifth resistive device coupled with the first node;
• a sixth resistive device substantially the same as the fifth resistive device coupled with the second node;
• and
• a seventh resistive device coupled between the first node and the second node.