Two-ended voltage level shifter for TFT LCD gate driver

A circuit for converting voltage levels comprising:

• a first transistor including a gate electrode for receiving an input signal having a first voltage level and a second voltage level;
• a second transistor including a gate electrode for receiving a bias voltage;
• a current source providing a current in response to the first voltage level of the input signal;
• a node disposed between the second transistor and the current source;
• and
• a complementary inverter connectable between a first power supply providing a third voltage level and a second power supply providing a fourth voltage level, the third voltage level and the fourth voltage level being lower than the greater of the first and second voltage levels,
• wherein the second transistor clamps a voltage level at the node between the third voltage level and the fourth voltage level;
• and
• wherein the voltage level at the node is approximately the third voltage level in response to the first voltage level of the input signal, and approximately the fourth voltage level in response to the second voltage level.

A method for converting voltage levels comprising:

• providing a first power supply of a first voltage level;
• providing a second power supply of a second voltage level;
• providing a third power supply of a third voltage level;
• forming a first transistor between the first and second power supplies including a gate electrode;
• providing to the gate electrode of the first transistor an input signal including a first state and a second state;
• forming a second transistor between the first transistor and the second power supply including a gate electrode;
• providing to the gate electrode of the second transistor a bias voltage;
• forming a current source between the second transistor and the second power supply providing a current in response to the first state of the input signal;
• pulling a voltage level at a node disposed between the second transistor and the current source to the third voltage level in response to the first state of the input signal;
• and
• pulling the voltage level at the node to the second voltage level in response to the second state of the input signal.