FBGA arrangement

An electronic component, comprising:

• a substrate including a bonding channel having a stepped configuration extending through the substrate, the substrate having a plurality of contact islands adjacent the bonding channel, wherein some of the contact islands are arranged in a first plane and others of the contact islands are arranged in a second plane, the first plane being parallel to and spaced from the second plane;
• a chip having a central row of bond pads on an upper surface;
• and
• a plurality of wire bridges electrically coupling the bond pads of the chip to the contact islands of the substrate, the wire bridges extending through the bonding channel;
• wherein a surface that is provided with a plurality of soldering balls arranged in an array, ones of the contact islands and ones of the soldering balls being electrically connected to one another via a rewiring of the substrate.

An electronic component, comprising:

• a substrate including a bonding channel having a stepped configuration extending through the substrate, the substrate having a plurality of contact islands adjacent the bonding channel, wherein some of the contact islands are arranged in a first plane and others of the contact islands are arranged in a second plane, the first plane being parallel to and spaced from the second plane;
• a chip having a central row of bond pads on an upper surface;
• and
• a plurality of wire bridges electrically coupling the bond pads of the chip to the contact islands of the substrate, the wire bridges extending through the bonding channel;
• wherein the substrate is provided with an additional conductive layer on a surface adjacent to the chip.

A method of forming an electronic component, the method comprising:

• providing a first substrate;
• providing a second substrate;
• forming a combined substrate by laminating the first substrate and the second substrate, the combined substrate including a bonding channel with a stepped configuration, wherein forming a combined substrate further comprises laminating a third substrate with the first and second substrates;
• securing a chip to the combined substrate such that bonding pads on the chip are aligned with the bonding channel of the combined substrate;
• electrically coupling some of the bonding pads of the chip to contact islands on the first substrate and others of the bonding pads of the chip to contact islands on the second substrate;
• and
• electrically coupling yet others of the bonding pads of the chip to contact islands on the third substrate.

A method of forming an electronic component, the method comprising:

• providing a first substrate having a first bonding channel extending there through;
• laminating the first substrate to a second substrate;
• after laminating, forming a second bonding channel in the second substrate, the second bonding being narrower than the first bonding channel;
• securing a chip to the first substrate such that bonding pads on the chip are aligned with the first and second bonding channels;
• and
• electrically coupling some of the bonding pads of the chip to contact islands on the first substrate and others of the bonding pads of the chip to contact islands on the second substrate.