Semiconductor package, semiconductor device and electronic device

A semiconductor package comprising:

• an insulating layer formed on a wafer that is provided with an electrode;
• an opening portion made in a region conformable to said electrode in said insulating layer;
• a rerouting layer connected to said electrode through said opening portion;
• a sealing resin layer which seals said wafer, said insulating layer, and said rerouting layer;
• and
• posts penetrating through said sealing resin layer, a solder bump being formed on each of upper surfaces of said posts;
• wherein each of said posts comprises:
• a resin projection portion formed on said insulating layer separated from other resin projections of other posts;
• and
• a conductive layer that coats at least an upper surface of said resin projection portion and connected to said rerouting layer and said solder bump;
• and
• wherein at least one part of a periphery of said posts is coated with said sealing resin layer, and said sealing resin layer is formed to have such a thickness that its upper surface apart from said posts is lower than said upper surfaces of said posts.

A semiconductor package, comprising:

• an insulating layer formed on a wafer that is provided with an electrode;
• an opening portion made in a region conformable to said electrode in said insulating layer;
• a rerouting layer connected to said electrode through said opening portion;
• a sealing resin layer which seals said wafer, said insulating layer, and said rerouting layer;
• and
• posts penetrating through said sealing resin layer, a solder bump being formed on each of upper surfaces of said posts;
• wherein each of said posts comprises:
• a resin projection portion formed on said insulating layer separated from other resin projections of other posts;
• and
• a conductive layer that coats at least an upper surface of said resin projection portion and is connected to said rerouting layer and said solder bump;
• wherein a boundary between said posts and said sealing resin layer is present outside said upper surfaces of said posts as is viewed in plan;
• and
• wherein a position of the center of said solder bump is consistent with a position of said center of said resin projection portion as are viewed in plan.

A semiconductor package, comprising:

• a wafer that is provided with an electrode;
• a rerouting layer connected to said electrode;
• a sealing resin layer which seals said wafer, and said rerouting layer;
• and
• posts penetrating through said sealing resin layer, a solder bump being formed on each of upper surfaces of said posts;
• wherein each of said posts comprises:
• a resin projection portion formed on said wafer separated from other resin projections of other posts;
• and
• a conductive layer that coats at least an upper surface of said resin projection portion and is connected to said rerouting layer and said solder bump;
• and
• wherein a boundary between said posts and said sealing resin layer is present outside said upper surfaces of said posts as is viewed in plan.