Semiconductor device having crystalline semiconductor layer
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hisashi Ohtani, Jun Koyama, Takeshi Fukunaga
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Abstract
A semiconductor device having performance comparable with a MOSFET is provided. An active layer of the semiconductor device is formed by a crystalline silicon film crystallized by using a metal element for promoting crystallization, and further by carrying out a heat treatment in an atmosphere containing a halogen element to carry out gettering of the metal element. The active layer after this process is constituted by an aggregation of a plurality of needle-shaped or column-shaped crystals. A semiconductor device manufactured by using this crystalline structure has extremely high performance.
Claims22
A semiconductor device having at least one thin film transistor, said thin film transistor comprising:
- a semiconductor layer formed over a substrate, said semiconductor layer having source and drain regions and a channel formation region interposed therebetween;
- and
- a gate electrode formed adjacent to said semiconductor layer with a gate insulating film interposed therebetween,
- wherein said semiconductor layer comprises needle-shaped or column-shaped crystals which are substantially aligned in a direction parallel to a length direction of said channel formation region,
- wherein a standard deviation of S-value of said thin film transistor is within 10 mV/dec for an N-channel type and 15 mV/dec for a P-channel type.
A semiconductor device having at least one thin film transistor, said thin film transistor comprising:
- a semiconductor layer formed over a substrate, said semiconductor layer having source and drain regions and a channel formation region interposed therebetween;
- and
- a gate electrode formed adjacent to said semiconductor layer with a gate insulating film interposed therebetween,
- wherein said semiconductor layer comprises needle-shaped or column-shaped crystals which are substantially aligned in a direction parallel to a length direction of said channel formation region,
- wherein a length of said channel formation region is 0.01 to 2 μm.
A semiconductor device having at least one thin film transistor, said thin film transistor comprising:
- a semiconductor layer formed over a substrate, said semiconductor layer having source and drain regions and a channel formation region interposed therebetween;
- and
- a gate electrode formed adjacent to said semiconductor layer with a gate insulating film interposed therebetween,
- wherein said semiconductor layer comprises needle-shaped or column-shaped crystals which are substantially aligned in a direction parallel to a carrier flow direction between said source and drain regions,
- wherein a standard deviation of S-value of said thin film transistor is within 10 mV/dec for an N-channel type and 15 mV/dec for a P-channel type.
A semiconductor device having at least one thin film transistor, said thin film transistor comprising:
- a semiconductor layer formed over a substrate, said semiconductor layer having source and drain regions and a channel formation region interposed therebetween;
- and
- a gate electrode formed adjacent to said semiconductor layer with a gate insulating film interposed therebetween,
- wherein said semiconductor layer comprises needle-shaped or column-shaped crystals which are substantially aligned in a direction parallel to a carrier flow direction between said source and drain regions,
- wherein a length of said channel formation region is 0.01 to 2 μm.
An active matrix display device comprising:
- a pixel matrix circuit formed over a substrate;
- a logic circuit formed over said substrate, said logic circuit having thin film transistors,
- wherein each of said thin film transistors comprises:
- a semiconductor layer formed over a substrate, said semiconductor layer having source and drain regions and a channel formation region interposed therebetween;
- and
- a gate electrode formed adjacent to said semiconductor layer with a gate insulating film interposed therebetween,
- wherein said semiconductor layer comprises needle-shaped or column-shaped crystals which are substantially aligned in a direction parallel to a length direction of said channel formation region,
- wherein a standard deviation of S-value of said thin film transistor is within 10 mV/dec for an N-channel type and 15 mV/dec for a P-channel type.
An active matrix display device comprising:
- a pixel matrix circuit formed over a substrate;
- a logic circuit formed over said substrate, said logic circuit having thin film transistors,
- wherein each of said thin film transistors comprises:
- a semiconductor layer formed over a substrate, said semiconductor layer having source and drain regions and a channel formation region interposed therebetween;
- and
- a gate electrode formed adjacent to said semiconductor layer with a gate insulating film interposed therebetween,
- wherein said semiconductor layer comprises needle-shaped or column-shaped crystals which are aligned substantially in a direction parallel to a carrier flow direction between said source and drain regions,
- wherein a length of said channel formation region is 0.01 to 2 μm.
An electronic device comprising:
- a display device having thin film transistors,
- wherein each of said thin film transistors comprises:
- a semiconductor layer formed over a substrate, said semiconductor layer having source and drain regions and a channel formation region interposed therebetween;
- and
- a gate electrode formed adjacent to said semiconductor layer with a gate insulating film interposed therebetween,
- wherein said semiconductor layer comprises needle-shaped or column-shaped crystals which are substantially aligned in a direction parallel to a length direction of said channel formation region,
- wherein a standard deviation of S-value of said thin film transistor is within 10 mV/dec for an N-channel type and 15 mV/dec for a P-channel type.
An electronic device comprising:
- a display device having thin film transistors,
- wherein each of said thin film transistors comprises:
- a semiconductor layer formed over a substrate, said semiconductor layer having source and drain regions and a channel formation region interposed therebetween;
- and
- a gate electrode formed adjacent to said semiconductor layer with a gate insulating film interposed therebetween,
- wherein said semiconductor layer comprises needle-shaped or column-shaped crystals which are substantially aligned in a direction parallel to a length direction of said channel formation region,
- wherein a length of said channel formation region is 0.01 to 2 μm.
Dependencies are inferred from the claim text.