US 7,022,561 B2 · CMOS device

Abstract

A method comprising providing a substrate having an NMOS device adjacent a PMOS device and forming a first stress layer over the NMOS and PMOS devices, wherein the first stress layer comprises a first tensile-stress layer or a compression-stress layer. An etch stop layer is formed over the first stress layer, and portions of the first stress layer and the etch stop layer are removed from over the NMOS device, leaving the first stress layer and the etch stop layer over the PMOS device. A second tensile-stress layer is formed over the NMOS device and over the first stress layer and the etch stop layer, and portions of the second tensile-stress layer and the etch stop layer are removed from over the PMOS device, leaving the second tensile-stress layer over the NMOS device.

Claims30

Dependent claims

A method, comprising:

providing a substrate having an NMOS device adjacent a PMOS device;
forming a first stress layer over the NMOS and PMOS devices, the first stress layer comprising one of a first tensile-stress layer and a compression-stress layer;
forming an etch stop layer over the first stress layer;
removing the first stress layer and the etch stop layer from over the NMOS device, leaving the first stress layer and the etch stop layer over the PMOS device;
forming a second tensile-stress layer over the NMOS device and over the first stress layer and the etch stop layer over the PMOS device;
and
removing the second tensile-stress layer and the etch stop layer from over the PMOS device, leaving the second tensile-stress layer over the NMOS device.

4 more elements

Dependencies are inferred from the claim text.

CMOS device

Life of this patent

CMOS device

Life of this patent

Abstract

Claims30