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US 7,022,551 B2Granted
Quad flat flip chip packaging process and leadframe therefor
AssigneeAdvanced Semiconductor Engineering, Inc.
InventorsHsueh-Te Wang, Meng-Jen Wang, Chien Liu, Chi-Hao Chiu
Life of this patent
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Abstract
A quad flat flip chip packaging process and a leadframe therefor are provided. A sacrificial film is attached on the leads of the leadframe for limiting the extent of bumps when formed and saving the manufacturing cost. Besides, the sacrificial film can be removed from the leadframe after a reflow step. Thus, the delamination between the molding compound material and the leads can be prevented during the molding step.
Claims12
A quad flat flip chip packaging process, comprising:
- providing a leadframe having at least a plurality of leads with an upper surface and a corresponding lower surface, wherein one end of each of the leads includes a bump connection region;
- forming a sacrificial film next to the bump connection region;
- providing a chip to electrically connect with the bump connection region of the leads through a plurality of bumps;
- removing the sacrificial film;
- and
- performing a molding step by using a molding compound material to encapsulate the chip and the leads and to expose the lower surface of the leads.
3 more elements
A leadframe for a quad flat flip chip package, comprising:
- a plurality of leads, wherein one end of each of the leads includes a bump connection region;
- and
- a detachable sacrificial film, disposed next to the bump connection region of the leads.
Dependencies are inferred from the claim text.