Fracturing polygons used in a lithography process for fabricating an integrated circuit
AssigneeSynopsys, Inc.
InventorBruce Luttrell
Life of this patent
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Abstract
A system is provided for fracturing a polygon on a mask layout used in a lithographic process for manufacturing an integrated circuit. The system receives mask layouts that include polygons that may include holes with exit routes near notches either on the outside of the polygon or internal to the hole. A notch is undesirable because fracturing the polygon for printing by the lithographic equipment can create slivers that do not expose well during exposure. The system moves the exit route for a vertex trace so that the exit route passes through a vertex of the notch thereby eliminating the sliver.
Claims21
A method for fracturing a polygon on a mask layout used in a lithographic process for manufacturing an integrated circuit, comprising:
- receiving the mask layout, wherein geometry from the mask layout includes the polygon;
- examining the polygon to determine if the polygon includes a hole exit route next to a notch;
- and
- if so, moving an exit route from the hole so that a resulting fracturing of the polygon does not create a sliver with a width less than a pre-specified minimum size.
A computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method for fracturing a polygon on a mask layout used in a lithographic process for manufacturing an integrated circuit, wherein the computer-readable storage medium includes an electromagnetic waveform, the method comprising:
- receiving the mask layout, wherein geometry from the mask layout includes the polygon;
- examining the polygon to determine if the polygon includes a hole next to a notch;
- and
- if so, moving an exit route from the hole so that a resulting fracturing of the polygon does not create a sliver with a width less than a pre-specified minimum size.
A mask having structures that were fractured according to a technique used in a lithographic process for manufacturing an integrated circuit,
- wherein the mask includes a polygon;
- wherein the polygon includes a hole;
- wherein the hole exit route is next to a notch;
- and
- wherein an exit route from the hole has been moved so that a sliver has not been created with a width less than a pre-specified minimum size.
Dependencies are inferred from the claim text.