Method of fabrication of MIMCAP and resistor at same level

#1. Field of the Invention

#The present invention relates generally to a method of fabricating a MIMCAP (a capacitor (CAP) formed by successive layers of metal, insulator, metal (MIM)) and a thin film resistor at the same level. The subject invention also pertains to a method of fabricating a MIMCAP and thin film resistor at same level, and a novel integration scheme for BEOL (back-end-of-line processing) thin film resistors which positions them closer to FEOL (front-end-of-line processing) devices.

#2. Discussion of the Prior Art

#The foregoing objects and advantages of the present invention for a method of fabrication of a MIMCAP and a thin film resistor at same level may be more readily understood by one skilled in the art with reference being had to the following detailed description of several embodiments thereof, taken in conjunction with the accompanying drawings wherein like elements are designated by identical reference numerals throughout the several views, and in which:

#FIGS. 1–10 illustrate the sequential steps of a method for fabricating a MIMCAP (a capacitor (CAP) formed by successive layers of metal, insulator, metal (MIM)) and a thin film resistor at the same level.

#FIG. 1 illustrates the structure after steps of depositing a 300A layer of oxide insulation, then depositing a layer of metal on top of the layer of oxide insulation to form the bottom electrode of the capacitor, then depositing a layer of dielectric on top of the layer of metal to form the dielectric of the capacitor.

#FIGS. 1–10 illustrate the sequential steps of a method for fabricating a MIMCAP (a capacitor (CAP) formed by successive layers of metal, insulator, metal (MIM)) and a thin film resistor at the same level.

#FIG. 1 illustrates the structure, which could be at any via level and preferably at the lowest metal level (M1), after steps of depositing a 300A layer 10 of oxide insulation, then depositing a layer of metal 12 such as TaN on top of the layer of oxide insulation to form the bottom electrode of the capacitor, then depositing a layer of dielectric 14 such as tantalum pentoxide, silicon nitride or silicon dioxide on top of the layer of metal to form the dielectric of the capacitor. Vias Vx are also shown as being representative of a typical circuit.

#FIG. 2 illustrates the structure after steps of lithographic patterning and etching the dielectric 20 and the bottom electrode 22 of the capacitor.