Method for monitoring and improving integrated circuit fabrication using FPGAs
AssigneeXilinx, Inc.
InventorsJoe W. Zhao, Xiao-Yu Li, Feng Wang, Zhi-Min Ling
Life of this patent
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Abstract
Methods for monitoring and improving the fabrication process of integrated circuits using configurable devices are described. In one aspect, the method includes instantiating a test pattern on one or more configurable devices fabricated using the fabrication process, identifying an underperforming region of the configurable devices, and determining if the underperforming region is layout sensitive. At least one of the fabrication process and the layout of the configurable device can then be adjusted based on the determination. In some embodiments, the configurable device may be a programmable logic device, such as a field programmable logic array.
Claims21
A method for monitoring and improving a fabrication process for integrated circuits comprising:
- instantiating a test pattern on a plurality of configurable devices fabricated on a wafer using the fabrication process;
- identifying at least one underperforming region in at least one of the plurality of configurable devices;
- determining if the at least one underperforming region is layout sensitive;
- and
- responsive to the step of determining, adjusting at least one of layout of the at least one of the plurality of configurable devices and the fabrication process;
- wherein if the at least one underperforming region is layout sensitive, the step of adjusting comprises adjusting the layout of the at least one of the plurality of configurable devices;
- and
- wherein if the at least one underperforming region is not layout sensitive, the step of adjusting comprises adjusting the fabrication process.
A system comprising:
- means for instantiating a test pattern on a plurality of configurable devices fabricated on a wafer using a fabrication process;
- means for identifying at least one underperforming region in at least one of the plurality of configurable devices;
- means for determining if the at least one underperforming region is layout sensitive;
- and
- means for adjusting at least one of layout of the at least one of the plurality of configurable devices and the fabrication process, responsive to the means for determining;
- wherein if the at least one underperforming region is layout sensitive, the means for adjusting adjusts the layout of the at least one of the plurality of configurable devices;
- and
- wherein if the at least one underperforming region is not layout sensitive, the means for adjusting adjusts the fabrication process.
Dependencies are inferred from the claim text.