Method for reducing a low volatility byproduct from a wafer surface following an etching process

A method for in-situ reduction of volatile residual contamination on a semiconductor process wafer following a shallow trench isolation (STI) plasma etching process comprising the steps of:

• first performing a plasma etching process;
• providing an ambient controlled chamber for accepting transfer of a semiconductor process wafer under controlled ambient conditions following the STI plasma etching process;
• providing a heat exchange surface disposed within the ambient controlled chamber in thermally conductive heat exchange relationship with a thermally conductive heating source;
• then transferring the semiconductor process wafer to the ambient controlled chamber, said semiconductor process wafer comprising volatile residual contamination contacting a silicon surface, said volatile residual contamination comprising a species selected from the group consisting of bromine and chlorine;
• mounting the semiconductor process wafer in heat exchange relationship with the heat exchange surface;
• and,
• then heating the semiconductor process wafer to vaporize the volatile residual contamination while simultaneously removing a resulting vapor from the ambient controlled chamber.