Method for manufacturing a MOS transistor having reduced 1/f noise

A metal oxide semiconductor (MOS) device made by the process comprising:

• forming an oxide layer on a silicon substrate;
• depositing a polysilicon layer on said oxide layer;
• implanting a fluorine dopant into said polysilicon layer at an implant dose of at least about 4×1014 atoms/cm2;
• and
• thermally annealing said polysilicon layer such that a portion of said fluorine dopant is diffused into said oxide layer to thereby reduce a 1/f noise of said MOS device, said thermally annealing step including maintaining said polysilicon layer at a temperature of between 850° C. and 950° C. for between about 10 and about 60 minutes.

A method of manufacturing an integrated circuit comprising:

• forming a metal oxide semiconductor (MOS) device by the process comprising:
• forming an oxide layer on a silicon substrate;
• depositing a polysilicon layer on said oxide layer;
• implanting a fluorine dopant into said polysilicon layer at an implant dose of at least about 4×1014 atoms/cm2;
• and
• thermally annealing said polysilicon layer such that a portion of said fluorine dopant is diffused into said oxide layer to thereby reduce a 1/f noise of said MOS device, said thermally annealing step including maintaining said polysilicon layer at a temperature of between 850° C. and 950° C. for between about 10 and about 60 minutes;
• and
• interconnecting said MOS device with interconnects to form an operative integrated circuit.