Method to reduce stacking fault nucleation sites and reduce forward voltage drift in bipolar devices

#The present invention relates to increasing the quality and desired properties of semiconductor materials used in electronic devices, particularly power electronic devices. In particular, the invention relates to an improved process for minimizing crystal defects in silicon carbide, and the resulting improved structures and devices. The present invention is related to the subject matter disclosed and claimed in co-pending and commonly assigned application Ser. No. 10/046,346; filed Oct. 26, 2001 and now published as No. 2003-0080842 A1; the contents of which are incorporated entirely herein by reference.

#Silicon Carbide

#Silicon carbide (SiC) has emerged over the last two decades as an appropriate candidate semiconductor material that offers a number of advantages over both silicon and gallium arsenide. In particular, silicon carbide has a wide bandgap, a high breakdown electric field, a high thermal conductivity, a high saturated electron drift velocity, and is physically extremely robust. In particular, silicon carbide has an extremely high melting point and is one of the hardest known materials in the world.

#FIG. 1 is a photograph of the surface of a SiC substrate following an etch in molten KOH.

#FIG. 2 is a photograph of a carrot defect on a SiC surface.

#FIG. 3 is a photograph of the same carrot defect following an etch in molten KOH.

#The invention is a method of preparing a substrate for reducing stacking fault nucleation and reducing forward voltage (Vf) drift in silicon carbide-based bipolar devices.

#In a first embodiment the method initially comprises conducting a non-selective etch, preferably a dry etch, most preferably a reactive ion etch (RIE), on the surface of a silicon carbide substrate to remove both surface and sub-surface damage that typically results from the sawing and lapping of the extremely hard SiC material. As known to those familiar with the manufacture of electronic devices, a nonselective etch removes all material at an equal rate. A selective etch removes specific materials e.g. damaged, n-type, p-typemore quickly than the other materials. Exemplary, but not limiting, techniques for dry etching of silicon carbide are set forth in U.S. Pat. No. 4,865,685 and its sibling U.S. Pat. No. 4,981,551 the contents of which are incorporated entirely herein by reference. Other techniques and chemistries for carrying out the selective and non-selective etches described herein are generally well-recognized in the art and will not be described in detail herein other than to illustrate embodiments of the invention.

#The term “substrate” is used herein in a sense that is broad enough to include both a bulk single crystal (usually cut from a boule) as well as a device precursor structure that can include one or more epitaxial layers, but which fundamentally (although not necessarily exclusively) serves as the physical and electronic support for a device formed thereon.