Layout design system, layout design method and layout design program of semiconductor integrated circuit, and method of manufacturing the same
AssigneeKabushiki Kaisha Toshiba
InventorsMutsunori Igarashi, Takashi Mitsuhashi
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Abstract
A layout design system of a semiconductor integrated circuit, comprising: a library information storage unit configured to register a basic via shape list; a technology database storage unit configured to register a list expressing an optimum wire terminating process for each via shape of said basic via shape list registered in said library information storage unit; and a central processing control unit configured to refer to the lists respectively registered in said library information storage unit and said technology database storage unit, select an optimum line processing, and execute a line design.
Claims8
A computer implemented layout design method, comprising:
- generating a first line having a first line width and extending in a predetermined direction;
- generating a second line having a second line width, extending in a direction different from said first line, and having its terminal end overlapping a terminal end of said first line;
- stretching said first line in a longitudinal direction thereof;
- stretching said second line in a longitudinal direction thereof by a length ½ times as long as the second line width;
- deleting a projection from the terminal end of said first line and the terminal end of said second line, the projection protruding from an overlapped area where the terminal end of said first line and the terminal end of said second line overlap;
- and
- setting a connection pattern having an octagon connecting said first and second lines at an intersection point of a longitudinal center line of said first line and a longitudinal center line of said second line.
A manufacturing method of a semiconductor integrated circuit, comprising:
- forming a first line extending in a predetermined direction on a semiconductor substrate;
- forming a level interlayer insulating film on said first line;
- forming an octagonal via hole penetrating through said level interlayer insulating film;
- forming a connection conductive portion filling said an octagonal via hole and connecting with said first line;
- and
- forming a second line extending at an angle unperpendicularly relative to said first line and having a terminal end connected to said connection conductive portion.
Dependencies are inferred from the claim text.