Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages
AssigneeMicron Technology, Inc.
InventorLeel S. Janzen
Life of this patent
Estimating the term…
Abstract
A method and circuit for refreshing dynamic data stored in an integrated circuit are disclosed. The integrated circuit receives a supply voltage and operates in a self-refresh mode of operation to refresh the dynamic data at a refresh time that defines how often the dynamic data is refreshed during the self-refresh mode. The method includes monitoring a magnitude of the supply voltage and adjusting the refresh time as a function of the monitored magnitude of the supply voltage. The integrated circuit may be any type of integrated circuit that stores dynamic data, such as a memory device like a dynamic random access memory, DDR DRAM, SLDRAM, or RDRAM, or other type of integrated circuit such as a microprocessor.
Claims20
A method for controlling a refresh rate of dynamic data, the method comprising:
- receiving an input voltage having a magnitude that is indicative of a mode of operation, the mode of operation including a normal mode and a low-power mode;
- in the normal mode, generating a refresh bias voltage having a substantially constant value;
- in the low-power mode, adjusting the value of the refresh bias voltage as a function of the magnitude of the input voltage;
- developing a refresh clock signal having a frequency that is a function of the refresh bias voltage;
- and
- in response to the refresh clock signal, developing refresh signals that control the refresh rate of the dynamic data as a function of the frequency of the refresh clock signal.
A method for controlling a refresh rate of dynamic data, the method comprising:
- receiving an input voltage having a magnitude that is indicative of a mode of operation, the mode of operation including a normal mode and a low-power mode;
- in the normal mode, generating a refresh bias voltage having a substantially constant value;
- in the low-power mode, outputting the input voltage as the bias voltage;
- developing a refresh clock signal having a frequency that is a function of the refresh bias voltage;
- and
- in response to the refresh clock signal, developing refresh signals that control the refresh rate of the dynamic data as a function of the frequency of the refresh clock signal.
A method for controlling a refresh rate of dynamic data in an integrated circuit, the method comprising:
- receiving an input voltage having a magnitude that is indicative of a mode of operation, the mode of operation including a normal mode and a low-power mode;
- in the normal mode, generating a refresh bias voltage having a substantially constant value;
- in the low-power mode, adjusting the value of the refresh bias voltage as a function of the magnitude of the input voltage in response to a bias adjustment command that is generated external to the integrated circuit;
- developing a refresh clock signal having a frequency that is a function of the refresh bias voltage;
- and
- in response to the refresh clock signal, developing refresh signals that control the refresh rate of the dynamic data as a function of the frequency of the refresh clock signal.
A method for controlling a refresh rate of dynamic data, the method comprising:
- receiving an input voltage having a magnitude that is indicative of a mode of operation, the mode of operation including a normal mode, a first low-power mode, and a second low-power mode;
- in the normal mode, generating a refresh bias voltage having a substantially constant value;
- in the first low-power mode, adjusting the value of the refresh bias voltage as a function of the magnitude of the input voltage;
- in the second low-power mode, outputting the input voltage as the bias voltage;
- developing a refresh clock signal having a frequency that is a function of the refresh bias voltage;
- and
- in response to the refresh clock signal, developing refresh signals that control the refresh rate of the dynamic data as a function of the frequency of the refresh clock signal.
Dependencies are inferred from the claim text.