Methods and apparatuses for designing integrated circuits
AssigneeSynplicity, Inc.
InventorsKenneth S. McElvain, Robert Erickson
Life of this patent
Estimating the term…
Abstract
Methods and apparatuses for designing an integrated circuit. In one example of a method, a hardware description language (HDL) code is compiled to produce a technology independent RTL (register transfer level) netlist. A portion of an area of the IC is allocated to a specific portion of the technology independent RTL netlist. In a typical implementation of this method, the allocation restricts circuitry created from the specific portion to the portion of the IC.
Claims99
A method for designing an integrated circuit (IC), comprising:
- creating a hardware description language (HDL) code, said HDL code to functionally describe said IC;
- allocating a portion of an area of said IC to a specific portion of said HDL code;
- and
- selecting a portion of said HDL code designed for placement in one of said area of said IC and another area of said IC and replicating a logic resulting from said portion of said HDL code for placement on at least one of said area and said another area of said IC.
A method for designing an integrated circuit (IC), comprising:
- compiling a hardware description language (HDL) code to produce a technology independent register transfer level (RTL) netlist;
- mapping said RTL netlist to a target architecture to generate a technology specific netlist;
- allocating a portion of an area of said IC to a specific portion of said technology specific netlist;
- and
- selecting logic designed for placement in one of said area of said IC and another area of said IC and replicating said logic for placement on at least one of said area and said another area of said IC.
A method for designing an integrated circuit (IC), comprising:
- creating a description of said IC;
- allocating a portion of an area of said IC to a specific portion of said description;
- and
- selecting logic designed for placement in one of said area of said IC and another area of said IC and replicating said logic for placement on at least one of said area and said another area of said IC.
A machine readable medium having stored thereon executable program code which, when executed, causes a machine to perform a method for designing an integrated circuit (IC), said method comprising:
- creating a hardware description language (HDL) code, said HDL code to functionally describe said IC;
- allocating a portion of an area of said IC to a specific portion of said HDL code;
- and
- selecting a portion of said HDL code designed for placement in one of said area of said IC and another area of said IC and replicating a logic resulting from said portion of said HDL code for placement on at least one of said area and said another area of said IC.
A machine readable medium having stored thereon executable program code which, when executed, causes a machine to perform a method for designing an integrated circuit (IC), said method comprising:
- compiling a hardware description language (HDL) code to produce a technology independent register transfer level (RTL) netlist;
- mapping said RTL netlist to a target architecture to generate a technology specific netlist;
- allocating a portion of an area of said IC to a specific portion of said technology specific netlist;
- and
- selecting logic designed for placement in one of said area of said IC and another area of said IC and replicating said logic for placement on at least one of said area and said another area of said IC.
A machine readable medium having stored thereon executable program code which, when executed, causes a machine to perform a method for designing an integrated circuit (IC), said method comprising:
- creating a description of said IC;
- allocating a portion of an area of said IC to a specific portion of said description;
- and
- selecting logic designed for placement in one of said area of said IC and another area of said IC and replicating said logic for placement on at least one of said area and said another area of said IC.
A digital processing system for use in designing an integrated circuit (IC), said digital processing system comprising:
- a display device;
- a memory;
- a processor coupled to said memory and said display device, said processor:
- creating a hardware description language (HDL) code, said HDL code to functionally describe said IC;
- allocating a portion of an area of said IC to a specific portion of said HDL code;
- and
- selecting a portion of said HDL code designed for placement in one of said area of said IC and another area of said IC and replicating a logic resulting from said portion of said HDL code for placement on at least one of said area and said another area of said IC.
A digital processing system for use in designing an integrated circuit (IC), said digital processing system comprising:
- a display device;
- a memory;
- a processor coupled to said memory and said display device, said processor:
- compiling a hardware description language (HDL) code to produce a technology independent register transfer level (RTL) netlist;
- mapping said RTL netlist to a target architecture to generate a technology specific netlist;
- allocating a portion of an area of said IC to a specific portion of said technology specific netlist;
- and
- selecting logic designed for placement in one of said area of said IC and another area of said IC and replicating said logic for placement on at least one of said area and said another area of said IC.
A digital processing system for use in designing an integrated circuit (IC), said digital processing system comprising:
- a display device;
- a memory;
- a processor coupled to said memory and said display device, said processor:
- creating a description of said IC;
- allocating a portion of an area of said IC to a specific portion of said description;
- and
- selecting logic designed for placement in one of said area of said IC and another area of said IC and replicating said logic for placement on at least one of said area and said another area of said IC.
Dependencies are inferred from the claim text.