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US 7,010,765 B2Granted
Method for identifying removable inverters in an IC design
AssigneeCadence Design Systems, Inc.
InventorsI-Min Liu, Wei-Lun Kao
Life of this patent
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AssigneeCadence Design Systems, Inc.
InventorsI-Min Liu, Wei-Lun Kao
Estimating the term…
An integrated circuit design includes a description of a net for distributing a signal from a root node to one or more leaf nodes downstream of the root node. Some segments of the net include inverters and some segments branch into other segments. The IC design is processed to determine a maximum number of inverters that can be removed from the net without affecting a logic state of the signal as it arrives at the leaf nodes. For each segment of the net other than segments terminating on root or leaf nodes two corresponding data sets are generated: one data set indicates a maximum number of inverters that may be removed downstream of its corresponding segment without altering the logic state of the signal at any downstream leaf node, and the other data set indicates a maximum number of downstream inverters that may be removed that will alter the logic state of the signal arriving at every downstream leaf node. Each data set points to all data sets corresponding to segments immediately downstream of the data set's corresponding segment, so that the data sets for all segments form a decision tree that may be traversed to determine which inverters must be removed to maximize the number of inverters removed from the net without affecting the logic state of the signal arriving at each leaf node.
A method for processing an integrated circuit (IC) design including a description of a net for conveying a signal downstream from a root node to a plurality of leaf nodes wherein the net comprises a plurality of inverters and a plurality of a segments including a single root segment connected to the root node, a plurality of inverter segments, each terminating at an input of a separate one of the inverters, at least one branch segment branching into a plurality of other net segments, and at least one leaf segment, each terminating at a separate one of the leaf nodes, the method comprising the steps of:
Computer readable media, which when read and executed by a computer, causes the computer to carry out a method for processing an integrated circuit (IC) design including a description of a net for conveying a signal downstream from a root node to a plurality of leaf nodes wherein the net comprises a plurality of inverters and a plurality of a segments including a single root segment connected to the root node, a plurality of inverter segments, each terminating at an input of a separate one of the inverters, at least one branch segment branching into a plurality of other net segments, and at least one leaf segment, each terminating at a separate one of the leaf nodes, wherein the method comprises the steps of:
A method of processing an integrated circuit design including a description of a net for distributing a signal from a root node to one or more leaf nodes downstream of the root node, wherein some segments of the net include inverters and some segments branch into other segment, for determining a maximum number of inverters that can be removed from the net without affecting a logic state of the signal as it arrives at the leaf nodes, the method comprising the steps of:
Dependencies are inferred from the claim text.