Combinational circuit, and encoder, decoder and semiconductor device using this combinational circuit

A semiconductor device used for processing a digital signal, said device comprising:

• input means, for receiving a coded digital signal;
• processing means, for processing said coded digital signal and for calculating coefficients of error locator polynomial and coefficients of error value polynomial;
• and
• output means, for outputting a digital signal obtained by correcting errors using said coefficients of error locator polynomial and said coefficients of error value polynomial,
• wherein said input means is constituted by a sequential circuit, and said processing means is constituted by a combinational circuit, and
• wherein said combinational circuit includes:
• a plurality of multipliers, independently performing two or more multiplications for coded digital signals in a Galois extension field GF(2m), where m is an integer equal to or greater than 2,
• wherein said multipliers include
• an input side XOR calculator,
• an AND calculator, and
• an output side XOR calculator, and
• wherein said multipliers share said input side XOR calculator.

A semiconductor device used for processing a digital signal, said device comprising:

• input means, for receiving a coded digital signal;
• processing means, for processing said coded digital signal and for calculating coefficients of error locator polynomial and coefficients of error value polynomial;
• and
• output means, for outputting a digital signal obtained by correcting errors using said coefficients of error locator polynomial and said coefficients of error value polynomial,
• wherein said input means is constituted by a sequential circuit, and said processing means is constituted by a combinational circuit, and
• wherein said combinational circuit includes:
• a logical sum calculator for a Galois extension field GF(2m), where m is an integer equal to or greater than 2,
• wherein said multipliers include an adder connected between said AND calculator and said output side XOR calculator,
• wherein said output side XOR calculator is used in common, and
• wherein outputs of said AND calculators in said multipliers are added by said adders, and addition results are calculated by said output side XOR calculator that is used in common.