Built-in test support for an integrated circuit

Test circuitry for testing an integrated circuit, the test circuitry including stimulus circuitry and capture circuitry, the stimulus circuitry including:

• a dictionary storing a plurality of read/write operation primitives, the primitives being combinable to form at least a first read/write testing sequence;
• and
• a librarian sub-block for receiving the input data, the input data being indicative of a test to be applied to the integrated circuit, the librarian sub-block being configured to control, on the basis of the input data, which of the primitives are provided to the integrated circuit, and the order in which they are provided, based on the input data;
• wherein the capture circuitry captures response data from the integrated circuit.

A method of testing an integrated circuit using test circuitry associated therewith, the test circuitry including:

• stimulus circuitry;
• input selection means;
• capture circuitry;
• and
• output selection means;
• the integrated circuit being configurable to accept input data from stimulus scan cells and to provide output data to response scan cells, the method including the steps of:
• providing input data from the stimulus scan cells to the stimulus circuitry and test data to the integrated circuit from the stimulus circuitry;
• operating the input selection means to control which of the test data and the input data are received at the integrated circuit;
• capturing output data from the integrated circuit using the capture circuitry;
• generating response data based on the output data;
• operating the output selection means to select which of the output data and the response data are received by the response scan cells.

A method for testing an integrated circuit using test circuitry, the test circuitry including stimulus circuitry and capture circuitry, the stimulus circuitry including:

• a dictionary storing a plurality of read/write operation primitives, the primitives being combinable to form at least a first read/write testing sequence;
• and
• a librarian sub-block;
• the method including the steps of:
• receiving input data at the librarian sub-block, the input data being indicative of a test to be applied to the integrated circuit;
• selecting, on the basis of the input data and using the librarian sub-block, one or more of the primitives and an order of the primitives so selected;
• providing the selected primitives to the integrated circuit in the selected order;
• and
• capturing response data from the integrated circuit using the capture circuitry.

Test circuitry for testing an integrated circuit, the integrated circuit being configurable to accept input data from stimulus scan cells and to provide output data to response scan cells, the test circuitry including:

• stimulus circuitry configured to receive the input data from the stimulus scan cells and for providing test data to the integrated circuit;
• input circuitry operable to control which of the test data and the input data are received at the integrated circuit;
• capture circuitry for capturing output data from the integrated circuit and generating response data;
• output circuitry operable to select which of the output data and the response data are received by the response scan cells.