Information processing device
AssigneeFujitsu Limited
InventorsNorihiro Nakatsuhama, Yoshiaki Nagatomi, Yoshiyuki Kubo
Life of this patent
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Abstract
An information processing device capable of accepting a communication request from another information processing device without fail, regardless of whether the device is in a standby state or not. A first condition detection circuit detects, synchronously with a clock signal, a communication start condition for starting communication with the other information processing device, and a second condition detection circuit detects, asynchronously with the clock signal, the communication start condition for starting communication with the other information processing device. A selector circuit selects a suitable one of the first and second condition detection circuits.
Claims11
An information processing device connected to a second information processing device for communicating information therewith through a bus, comprising:
- a clock control circuit for controlling start and stop of supply of a clock signal to individual parts of said information processing device;
- a first condition detection circuit for detecting, synchronously with the clock signal, a communication start condition for starting communication with the second information processing device;
- a second condition detection circuit for detecting, asynchronously with the clock signal, the communication start condition for starting communication with the second information processing device;
- and
- a selector circuit for selecting a suitable one of said first and second condition detection circuits;
- wherein said second condition detection circuit detects the communication start condition for starting communication with the second information processing device when the supply of the clock signal to the individual parts of said information processing device is stopped by said clock control circuit.
An information processing device connected to a second information processing device for communicating information therewith through a bus, comprising:
- a clock control circuit for controlling start and stop of supply of a clock signal to individual parts of said information processing device;
- a first condition detection circuit for detecting, synchronously with the clock signal, a communication start condition for starting communication with the second information processing device;
- a CR oscillator circuit for oscillating at a predetermined frequency;
- a second condition detection circuit for detecting, synchronously with a signal output from said CR oscillator circuit, the communication start condition for starting communication with the second information processing device;
- a selector circuit for selecting a suitable one of said first and second condition detection circuits;
- wherein said second condition detection circuit detects the communication start condition for starting communication with the second information processing device when the supply of the clock signal to the individual parts of said information processing device is stopped by said clock control circuit.
Dependencies are inferred from the claim text.