Performance of a cache by including a tag that stores an indication of a previously requested address by the processor not stored in the cache

A system, comprising:

• a processor, wherein said processor has a cache memory associated with it;
• a system memory for storing data of said processor;
• a bus system coupling said processor to said system memory;
• wherein said cache memory comprises:
• a first tag storing an indication of an address previously requested by said processor not stored in said cache memory;
• logic for receiving a request of an address of data from said processor;
• logic for determining if said requested data is located in said cache memory;
• logic for determining if said requested address is associated with contents of said first tag if said requested data is not located in said cache;
• and
• logic for replacing a data element in said cache using said contents of said first tag if said requested address is associated with said contents of said first tag and if a bit associated with said first tag is in a first state, wherein said bit associated with said first tag is in said first state if said contents of said first tag were previously requested and not located in said cache.