CAN module with jointly utilized components for connecting to multiple CAN buses
AssigneeInfineon Technologies AG
InventorAchim Vowe
Life of this patent
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Abstract
A CAN module contains several sets of storage elements for storing several sets of data representing different states of components of the CAN module. For example, a single bit stream processor component, one of the largest and most complicated constituents of the CAN module, can be used for a plurality of CAN buses when data representations of the different states of the bit stream processor are stored in the sets of storage elements. The CAN module can be used as a shared CAN module for several CAN buses and/or CAN nodes.
Claims14
A controller area network (CAN) module, comprising:
- a plurality of sets of storage elements for storing a plurality of sets of data representing different states of the CAN module;
- a first CAN node;
- a second CAN node;
- at least one jointly utilized component of the CAN module having a state represented by the sets of data stored in said sets of storage elements and configured to be connected alternately to one of said first CAN node and said second CAN node;
- and
- said sets of storage elements containing a first storage element set and a second storage element set, and including a first multiplexer through which said at least one jointly utilized component having a state represented by the sets of data stored in said sets of storage elements can be connected to one of said first storage element set and said second storage element set.
A controller area network (CAN) module for a microcontroller, the CAN module comprising:
- storage elements for storing data representing different states of the CAN module;
- bit timing logic units, including a first bit timing logic unit and a second bit timing logic unit;
- and
- a logic unit connected between said bit timing logic units and said storage elements, a state of said logic unit is represented by the data stored in said storage elements and said logic unit is a jointly utilized component that can be connected alternately to one of said first bit timing logic unit and to said second bit timing logic unit.
Dependencies are inferred from the claim text.