Methods and apparatus for optimizing lists of waveforms
AssigneeAgilent Technologies, Inc.
InventorAndrew Steven Hildebrant
Life of this patent
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Abstract
A list of waveforms is received (the list being one that is to be driven to or received from a pin of a device under test). The list of waveforms is de-interleaved to form lists of non-interleaved waveforms. Each list of non-interleaved waveforms is then optimized by combining at least two of its entries. By way of example, the above method may be implemented by program code stored on a number of computer readable media, or by a circuit tester having program code for implementing same.
Claims23
A computer-implemented method for optimizing a list of interleaved waveforms that are to be driven to or received from a pin of a device under test, comprising:
- receiving the list of interleaved waveforms;
- de-interleaving the list of interleaved waveforms to form lists of non-interleaved waveforms;
- optimizing each list of non-interleaved waveforms for a different one of a plurality of waveform memories, each waveform memory of which is associated with the pin of the device under test, by combining at least two of the list's entries;
- and
- outputting the waveforms of the optimized lists in a computer-readable form suitable for programming the plurality of waveform memories.
An apparatus for optimizing a list of interleaved waveforms that are to be driven to or received from a pin of a device under test, comprising:
- a number of computer readable media;
- and program code, stored on the computer readable media, defining:
- an interface to receive the list of interleaved waveforms;
- program code to de-interleave the list of interleaved waveforms to form lists of non-interleaved waveforms;
- and
- program code to i) optimize each of the lists of non-interleaved waveforms for a different one of a plurality of waveform memories, each waveform memory of which is associated with the pin of the device under test, by combining at least two of the list's entries, and then ii) output the waveforms of the optimized lists in a computer-readable form suitable for programming the plurality of waveform memories.
A circuit tester, comprising:
- a plurality of driving probes and receiving probes;
- a plurality of waveform memories;
- a switching network to associate plural multiplexed waveform memories with ones of the driving probes and receiving probes;
- an interface to receive lists of interleaved waveforms that are to be driven to and received from the driving probes and receiving probes;
- program code to de-interleave each list of waveforms, thereby forming a set of lists of non-interleaved waveforms for each list of interleaved waveforms;
- program code to optimize each list of non-interleaved waveforms by combining at least two of the list's entries;
- and
- program code to program the waveform memories corresponding to the optimized lists.
Dependencies are inferred from the claim text.