Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost

A switch apparatus comprising:

• a plurality of integrated circuits, wherein each integrated circuit includes a slice of a fiber channel arbitrated loop (FCAL) switch and are coupled to form said FCAL switch;
• said each integrated circuit including a plurality of port circuits, wherein each port circuit includes a buffer memory that is bypassed during a connection request within said FCAL switch;
• and
• said each integrated circuit also includes a portion of a distributed, scaleable crossbar switch, wherein a number of integrated circuit slices are coupled to form said FCAL switch having a plurality of ports,
• wherein said plurality of ports correspond to a size of a network for the switch to be used, and wherein said plurality of ports is limited by an available FCAL address space of 128 nodes,
• wherein said crossbar switch is structured such that when all of said integrated circuits are coupled together, a complete crossbar switch is formed, said integrated circuit or circuits including a lookup table and circuitry to use the destination address of a primitive arriving from a local FCAL net coupled to a port circuit to access said lookup table to determine the local FCAL net and port coupled to a destination node having that destination address and to determine whether to make connections so as to forward the primitive back onto the local FCAL net from which the primitive arrived and keep any subsequent data frames and primitives on the local FCAL net or to forward the primitive to another port on the same integrated circuit for coupling onto its FCAL net and transmit subsequent data frames and primitives between the FCAL net coupled to the port which received the primitive and the FCAL net coupled to another port on the same integrated circuit having the destination node identified in said primitive or to make connections through said crossbar switch to forward said primitive to a port on another integrated circuit and an FCAL net coupled to said port and said destination node and to transfer any subsequent data frames and primitives between said FCAL nets coupled to different integrated circuits through said crossbar switch and the ports coupled to said FCAL nets.