Method and apparatus to reduce bias temperature instability (BTI) effects

An electronic system comprising:

• a controller having a clock output and a phase mode output;
• an input phase select coupled to an input data signal, an input coupled to the phase mode, and having an input phase select output, the input phase select output being a true or complement of the logical value of the input data signal, selected by the phase mode;
• a storage element having a data input coupled to the input phase select output, a clock input, and a storage element output, the clock input capable of latching the data input into the storage element;
• an output phase select having an input coupled to the storage element output, an input coupled to the phase mode, and having an output phase select output, the output phase select output being a true or a complement phase of the storage element data as determined by the phase mode.

A method for reducing bias temperature instability caused VT shifts in storage elements in an electronic system comprising the steps of:

• storing storage element data as a true phase during a first state;
• storing storage element data as a complement phase during a second state;
• ensuring that the electronic system spends at least a first portion of a total operational time in the first state, accumulating a first total time in the first state;
• and
• ensuring that the electronic system spends at least a second portion of a total operational time in the second state, accumulating a second total time in the second state.