Method of determining voltage compensation for flash memory devices
AssigneeFasl LLC
InventorsEd Hsia, Darlene Hamilton, Alykhan Madhani, Kenneth Yu
Life of this patent
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Abstract
The present invention determines or identifies programming variations for different groups within an array or memory device that properly program memory cells within the respective groups. Then, during programming operations for a given memory cell, programming voltages are applied according to the determined or identified programming variations for the group to which the given memory cell belongs. These adjusted programming variations facilitate successful programming of the particular memory cell.
Claims12
A method of characterizing programming properties of a dual bit flash memory cell comprising:
- applying a drain voltage to an acting drain of the memory cell and applying a source voltage to an acting source of the memory cell;
- concurrently applying a gate voltage to a gate of the memory cell, wherein the gate voltage is at an initial value;
- measuring a drain source current from the acting drain to the acting source and repeatedly adjusting the applied gate voltage according to the measured drain current until the measured drain current is about an acceptable value;
- determining a gate voltage adjustment for the memory cell according to a final value of the applied gate voltage and the initial value;
- determining a drain voltage adjustment for the memory cell.
Dependencies are inferred from the claim text.