Circuit and method for reducing leakage current in a row driver circuit in a flash memory during a standby mode of operation

A method of operating a flash memory device during a standby mode of operation, the flash memory device including a memory-cell array having a plurality of memory cells arranged in rows and columns, each memory cell in a respective row being coupled to an associated word line having a respective row driver circuit, the method comprising:

• detecting an active mode of operation of the memory device;
• during the active mode of operation,
• receiving addresses corresponding to memory cells to be accessed,
• coupling a first voltage to the word line of addressed memory cells through a pull-up transistor of the respective row driver circuit to access the memory cells in the corresponding row, and
• applying a second voltage to each word line associated with memory cells not being accessed;
• detecting the standby mode of operation;
• and
• during the standby mode of operation, coupling gates of pull-down transistors of the row driver circuits to the first voltage and isolating at least some of the pull-down transistors from the second voltage.