Method for operating a CMOS image sensor

A method for operating a CMOS image sensor including a matrix of pixels arranged in plurality of lines and columns, each of said pixels including a photosensor element accumulating charge carriers in proportion to the illumination thereof, at least a MOS transistor and storage means able to be coupled to said photosensor element by means of the MOS transistor at a determined instant in order to generate a sampled signal representative of said charge carriers accumulated by said photosensor, said storage means being intended to assure storage for the purpose of reading said sampled signal,

• wherein, said method includes;
• a first phase or initialisation phase, during which said photosensor element and said storage means are initialised at a determined initialisation voltage;
• a second phase or exposure phase during which said photosensor element is released from said initialisation voltage and generates charge carriers in proportion to its illumination, said photosensor element and said storage means being uncoupled from each other by means of the MOS transistor;
• a third phase or sampling phase during which said sampled signal which is generated and stored on said storage means by coupling said photosensor element to said storage means by means of the MOS transistor;
• and
• a fourth phase or reading phase, during which said sampled signal which is stored on said storage means is read, said photosensor element and said storage means being uncoupled from each other by means of the MOS transistor,
• and wherein during said fourth phase, said photosensor element is held at a voltage such that any charge carrier generated by said photosensor element is drained and thus does not disturb said sampled signal stored on said storage means,
• and wherein:
• during said first phase, said photosensor element and said storage means are uncoupled from each other by means of the MOS transistor;
• during said third phase said storage means, in a first stage, is released from said initialisation voltage, then, in a second stage, is briefly coupled to said photosensor element, thus allowing said sampled signal to be generated and stored in said storage means, and
• during said fourth phase said photosensor element, in a first stage, is again initialised at said determined initialisation voltage, then, in a second stage, said sampled signal which is stored on said storage means is read,
• and wherein each pixel includes a reverse polarised photodiode forming said photosensor element and at least a first, a second and a third MOS transistor, said photodiode being connected, on one hand, to a first supply voltage and, on the other hand, to the sources of said first and second transistors, the drains of said first and third transistors being connected to a second supply voltage, the drain of said second transistor and the source of said third transistor being connected to each other and forming a memory node of said storage means,
• wherein:
• during said first phase, a first initialisation signal and a second initialisation signal applied respectively to the gate of said first and third transistors of each pixel are brought to levels such that, respectively, said photodiode and said memory node are initialised at a determined initialisation voltage, a control signal applied to the gate of said second transistor of each pixel being brought to a level such that said photodiode and said memory node are uncoupled;
• during said second phase, said first initialisation signal is brought to a level such that said photodiode is released from said initialisation voltage and accumulates charge carriers in proportion to its illumination;
• during said third phase, said second initialisation signal, in a first stage, is brought to a level such that said memory node is released from said initialisation voltage, and said control signal, in a second stage, is briefly brought to a level such that said photodiode and said memory node are coupled, thus allowing the sampled signal to be generated and stored on said memory node, and
• during said fourth phase, said first initialisation signal is first brought to a level such that said photodiode is again initialised at said determined initialisation voltage, and said sampled signal, stored on said memory node, is read.