Analog-to digital converter compensating apparatus and associated methods
AssigneeLockheed Martin Corporation
InventorRichard C. Gaus, Jr.
Life of this patent
Estimating the term…
Abstract
An analog-to-digital converter compensating apparatus and associated methods are provided. The apparatus can include an ADC, a state-slope sampler responsive to output data of the ADC to produce a state sample and a slope sample, a compensator which can include memory having an error-table associated therewith to provide an error or compensation sample to a combiner which combines the compensation sample with the state value to provide a compensated ADC output, and a compensator error processor positioned to receive the state sample, the slope sample, and an updated error value to dynamically update the compensator and thereby dynamically update the compensated ADC output.
Claims19
An apparatus to enhance compensation of output of an analog-to-digital converter (ADC), the apparatus comprising:
- an ADC having an analog input, a clocking input, and a digital output;
- a state-slope sampler including:
- a delay positioned to receive the digital output from the ADC as an input and the clocking input and having a delay output indicating a state value, and
- a differentiator also positioned to receive the digital output from the ADC as an input and the clocking input to differentiate the digital output from the ADC and having a differentiator output indicating a slope value;
- a compensator including:
- memory positioned to receive the delay output and the differentiator output and having an error-table associated therewith, a first address input receiving each of the respective delay and differentiator outputs, a second address input, an error data input, and an error data output,
- a first register also positioned to receive the delay output and the clocking input and having a first register output,
- a second register positioned to receive the error data output and the clocking input and having a second register output, and
- a combiner positioned to receive the first register output and the second register output and to combine the second register output with the first register output to thereby compensate the first register output by the second register output;
- and
- a compensating error processor positioned to receive the delay output, the differentiator output, and the clocking input, to compute new updated error-table values, and to update selected locations in the error-table associated with the memory with the updated error-table values, the compensating error processor having first and second updated processor outputs and an updated error output, the first and second updated processor outputs being positioned to be inputted to the second address input of the memory and the updated error output being positioned to be inputted to the error data input of the memory so that the updated error values compensate the error-table associated with the memory.
An apparatus to enhance compensation of output of an analog-to-digital converter (ADC), the apparatus comprising:
- an ADC;
- a state-slope sampler responsive to output data of the ADC to produce a state sample and a slope sample;
- a compensator including:
- memory responsive to the plurality of state-slope samples and having error data associated therewith to thereby produce a plurality of compensation samples, and
- a combiner positioned to combine each of the plurality of compensation samples from each of the plurality of state-slope samples;
- and
- a compensating error processor positioned to update the error data associated with the memory.
A method to enhance compensation of an analog-to-digital converter (ADC) output, the method comprising:
- providing a digital output of an ADC;
- compensating for error in the digital output responsive to an error-table;
- and
- dynamically updating the error-table, the dynamically updating of the error-table including determining an updated error-value for the error-table responsive to a weighted sum of a previous error value in the error-table and the updated error value.
Dependencies are inferred from the claim text.