Low resistance bandgap reference circuit with resistive T-network
AssigneeMicron Technology, Inc.
InventorPhilip Neaves
Life of this patent
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Abstract
A CMOS bandgap reference (BGR) voltage generator circuit has a passive resistor T-network of low resistance connected between the inverting and non-inverting inputs of the op-amp in the circuit. The op-amp's output is connected to the gates of three PMOS transistors and the drains of two of the transistors are connected in a looped manner to the input terminals of the op-amp. The T-network is placed between these drains that connect to the op-amp.
Claims16
A bandgap reference circuit comprising:
- an operational amplifier including a first input, a second input, and a first output;
- a T-network of passive resistors electrically connected between said first and said second inputs, wherein said T-network includes:
- a first resistor having a first terminal and a second terminal, wherein said first terminal is electrically connected to said first input,
- a second resistor having a third terminal and a fourth terminal, wherein said third terminal is electrically connected to said second terminal and said fourth terminal is electrically connected to said second input, and
- a third resistor having a fifth terminal and a sixth terminal, wherein said fifth terminal is electrically connected to at least one of said second and said third terminals and said sixth terminal is electrically connected to a reference potential;
- and
- a transistor network having a third input and a second output, wherein said first output of said operational amplifier is electrically connected to said third input to generate a bandgap reference voltage at said second output.
In a bandgap reference circuit having:
- an operational amplifier including a first input, a second input, and an output;
- a first CMOS transistor having a gate connected to said first output, a source connected to a supply voltage, and a drain connected to a diode, wherein said drain of said first CMOS transistor is configured to function as said first input;
- a second CMOS transistor having a gate connected to said first output, a source connected to said supply voltage, and a drain connected to a first resistor in series with a parallel network of diodes, wherein said drain of said second CMOS transistor is configured to function as said second input;
- a third CMOS transistor having a gate connected to said output, a source connected to said supply voltage, and a drain connected to a second resistor, wherein a bandgap reference voltage is obtained at said drain of said third CMOS transistor;
- the improvement comprises:
- a T-network of passive resistors connected between said first and said second inputs, wherein said T-network includes:
- a third resistor having a first terminal and a second terminal, wherein said first terminal is electrically connected to said first input,
- a fourth resistor having a third terminal and a fourth terminal, wherein said third terminal is electrically connected to said second terminal and said fourth terminal is electrically connected to said second input, and
- a fifth resistor having a fifth terminal and a sixth terminal, wherein said fifth terminal is electrically connected to at least one of said second and said third terminals and said sixth terminal is electrically connected to a reference potential.
A method comprising:
- providing an operational amplifier having a first input, a second input, and a first output;
- connecting a T-network of passive resistors between said first and said second inputs, wherein said T-network includes:
- a first resistor having a first terminal and a second terminal, wherein said first terminal is connected to said first input,
- a second resistor having a third terminal and a fourth terminal, wherein said third terminal is connected to said second terminal and said fourth terminal is connected to said second input, and
- a third resistor having a fifth terminal and a sixth terminal, wherein said fifth terminal is connected to at least one of said second and said third terminals and said sixth terminal is connected to a reference potential;
- and
- further providing a transistor network having a third input and a second output, wherein said first output of said operational amplifier is connected to said third input.
A method of generating a bandgap reference voltage, said method comprises:
- using an operational amplifier having a first input, a second input, and a first output;
- using a T-network of passive resistors between said first and said second inputs, wherein said T-network includes:
- a first resistor having a first terminal and a second terminal, wherein said first terminal is connected to said first input,
- a second resistor having a third terminal and a fourth terminal, wherein said third terminal is connected to said second terminal and said fourth terminal is connected to said second input, and
- a third resistor having a fifth terminal and a sixth terminal, wherein said fifth terminal is connected to at least one of said second and said third terminals and said sixth terminal is connected to a reference potential;
- further using a transistor network having a third input and a second output, wherein said first output of said operational amplifier is connected to said third input;
- and
- biasing said operational amplifier and said transistor network so as to generate said bandgap reference voltage at said second output.
Dependencies are inferred from the claim text.