Semiconductor package device that includes an insulative housing with a protruding peripheral portion

A semiconductor package device, comprising:

• an insulative housing with a top surface, a bottom surface, a peripheral side surface between the top and bottom surfaces, and an inner side surface opposite the peripheral side surface, wherein the bottom surface includes a peripheral portion adjacent to the peripheral and inner side surfaces and a central portion within the peripheral portion adjacent to the inner side surface and spaced from the peripheral side surface, the peripheral portion protrudes downwardly from the central portion, and the top and bottom surfaces, peripheral and inner side surfaces and peripheral and central portions are exposed;
• a semiconductor chip within the insulative housing, wherein the chip includes an upper surface, a lower surface and an outer side surface between the upper and lower surfaces, the upper surface includes a conductive pad, faces towards the central portion and faces away from the top surface, and the insulative housing covers the lower surface and contacts the chip;
• and
• a lead that protrudes laterally from and extends through the peripheral side surface and is electrically connected to the pad, wherein an electrically conductive path between and in contact with the lead and the pad is devoid of a wire bond.

A semiconductor package device, comprising:

• an insulative housing with a top surface, a bottom surface, a peripheral side surface between the top and bottom surfaces, and an inner side surface opposite the peripheral side surface, wherein the bottom surface includes a peripheral portion adjacent to the peripheral and inner side surfaces and a central portion within the peripheral portion adjacent to the inner side surface and spaced from the peripheral side surface, the peripheral portion is integral with the peripheral and inner side surfaces and non-integral with the central portion, the peripheral portion protrudes downwardly from the central portion, and the top and bottom surfaces, peripheral and inner side surfaces and peripheral and central portions are exposed;
• a semiconductor chip within the insulative housing, wherein the chip includes an upper surface, a lower surface and an outer side surface between the upper and lower surfaces, the upper surface includes a conductive pad, faces towards the central portion and faces away from the top surface, and the insulative housing contacts and covers the lower surface;
• and
• a lead that protrudes laterally from and extends through the peripheral side surface and is electrically connected to the pad, wherein an electrically conductive path between and in contact with the lead and the pad is devoid of a wire bond.

A semiconductor package device, comprising:

• an insulative housing with a top surface, a bottom surface, a peripheral side surface between the top and bottom surfaces, and an inner side surface opposite the peripheral side surface, wherein the bottom surface includes a peripheral portion adjacent to the peripheral and inner side surfaces and a central portion within the peripheral portion adjacent to the inner side surface and spaced from the peripheral side surface, the peripheral portion is integral with the peripheral and inner side surfaces and non-integral with the central portion, the peripheral portion protrudes downwardly from the central portion, and the top and bottom surfaces, peripheral and inner side surfaces and peripheral and central portions are exposed;
• a semiconductor chip within the insulative housing, wherein the chip includes an upper surface, a lower surface and an outer side surface between the upper and lower surfaces, the upper surface includes a conductive pad, faces towards the central portion and faces away from the top surface, and the insulative housing contacts and covers the lower surface;
• and
• a lead that protrudes laterally from and extends through the peripheral side surface and is electrically connected to the pad, wherein an electrically conductive path between and in contact with the lead and the pad is devoid of a wire bond, and the lead and the electrically conductive path are no closer to the top surface than the upper surface is to the top surface.

A semiconductor package device, comprising:

• an insulative housing with a top surface, a bottom surface, a peripheral side surface between the top and bottom surfaces, and an inner side surface opposite the peripheral side surface, wherein the bottom surface includes a peripheral portion adjacent to the peripheral and inner side surfaces and a central portion within the peripheral portion adjacent to the inner side surface and spaced from the peripheral side surface, the peripheral portion is integral with the peripheral and inner side surfaces and non-integral with the central portion, the peripheral portion protrudes downwardly from the central portion, and the top and bottom surfaces, peripheral and inner side surfaces and peripheral and central portions are exposed;
• a semiconductor chip within the insulative housing, wherein the chip includes an upper surface, a lower surface and an outer side surface between the upper and lower surfaces, the upper surface includes a conductive pad, faces towards the central portion and faces away from the top surface, and the insulative housing contacts and covers the lower and outer side surfaces;
• and
• a lead that protrudes laterally from and extends through the peripheral side surface and is electrically connected to the pad, wherein the lead includes a recessed portion that contacts and extends into the insulative housing and is spaced from the top and bottom surfaces and does not overlap the chip and a non-recessed portion that contacts and extends outside the insulative housing and is adjacent to the recessed portion and the bottom surface, and an electrically conductive path between and in contact with the lead and the pad is devoid of a wire bond.

A semiconductor package device, comprising:

• an insulative housing with a top surface, a bottom surface, a peripheral side surface between the top and bottom surfaces, and an inner side surface opposite the peripheral side surface, wherein the bottom surface includes a peripheral portion adjacent to the peripheral and inner side surfaces and a central portion within the peripheral portion adjacent to the inner side surface and spaced from the peripheral side surface, the peripheral portion is integral with the peripheral and inner side surfaces and non-integral with the central portion, the peripheral portion protrudes downwardly from the central portion, and the top and bottom surfaces, peripheral and inner side surfaces and peripheral and central portions are exposed;
• a semiconductor chip within the insulative housing, wherein the chip includes an upper surface, a lower surface and an outer side surface between the upper and lower surfaces, the upper surface includes a conductive pad, faces towards the central portion and faces away from the top surface, and the insulative housing contacts and covers the lower and outer side surfaces;
• and
• a lead that protrudes laterally from and extends through the peripheral side surface and is electrically connected to the pad, wherein the lead includes a recessed portion that extends into the insulative housing and is spaced from the top and bottom surfaces and a non-recessed portion that extends outside the insulative housing and is adjacent to the recessed portion and contacts the insulative housing, the recessed and non-recessed portions each include four outer surfaces, three of the outer surfaces of the recessed and non-recessed portions that do not face in the same direction as the bottom surface are coplanar with one another where the recessed and non-recessed portions are adjacent to one another, one of the outer surfaces of the recessed and non-recessed portions that face in the same direction as the bottom surface are not coplanar with one another where the recessed and non-recessed portions are adjacent to one another, an electrically conductive path between and in contact with the lead and the pad is devoid of a wire bond, and the lead and the electrically conductive path are no closer to the top surface than the upper surface is to the top surface.