PECVD air gap integration
AssigneeIntel Corporation
InventorsWilmer F. Borger, Jeffrey T. West, Ebrahim Andideh
Life of this patent
Estimating the term…
Abstract
A series of conductive layers separated by interlayer gaps is formed adjacent a substrate layer, the conductive layer and interlayer gap dimensions defining aspect ratios for trenches between the conductive layers. A layer of dielectric material is deposited over the conductive layers using plasma enhanced chemical vapor deposition. Trenches having aspect ratios within specified geometric categories are incompletely filled, leaving interlayer voids which may have desirable dielectric properties.
Claims16
A microelectronic structure comprising:
- a substrate layer;
- a silicon-based dielectric layer;
- two conductive layers crossing between the substrate layer and dielectric layer and being separated from each other by a void;
- wherein the silicon-based dielectric layer is in immediate contact with a top surface of each of the two conductive layers and at least partially defines the void;
- wherein substantially none of the dielectric layer is in contact with side walls of the two conductive layers;
- and
- wherein the silicon-based dielectric layer defines a void apex at a position substantially equidistant from the two conductive layers.
A microelectronic structure comprising:
- a substrate layer;
- a silicon-based dielectric layer;
- two conductive layers crossing between the substrate layer and dielectric layer and being separated from each other by a void;
- wherein the silicon-based dielectric layer is in immediate contact with a toy surface of each of the two conductive layers and at least partially defines the void;
- wherein the silicon-based dielectric layer defines a void apex at a position substantially equidistant from the two conductive layers;
- wherein the void apex is positioned farther from the substrate layer than any portion of the two conductive layers;
- and
- wherein the void apex substantially bisects two convex surfaces of the silicon-based dielectric layer, the two convex surfaces partially defining the void.
A microelectronic structure comprising:
- a substrate layer;
- a silicon-based dielectric layer;
- two conductive layers between the substrate layer and dielectric layer and being separated from each other by a void;
- an isolation layer on each of the two conductive layers and in immediate contact with each of the two conductive layers, positioned between each of the two conductive layers and the void, and between each of the two conductive layers and the silicon-based dielectric layer;
- wherein the silicon-based dielectric layer is in immediate contact with a top surface of the isolation layer and at least partially defines the void;
- wherein the dielectric layer comprises an apex joint, at which two surfaces of the dielectric layer meet between the first and second conductive layers, the apex joint being farther from the substrate layer than any portion of the first and second conductive layers;
- and
- wherein substantially none of the dielectric layer is in contact with side walls of the isolation layer.
Dependencies are inferred from the claim text.