Low capacitance FET for operation at subthreshold voltages
AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Andres Bryant, William F. Clark, Jr., Edward J. Nowak
Life of this patent
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Abstract
A field effect transistor (FET) has underlap regions adjacent to the channel doping region. The underlap regions have very low dopant concentrations of less than 1×1017/cc or 5×1016/cc and so tend to have a high resistance. The underlap regions reduce overlap capacitance and thereby increase switching speed. High resistance of the underlap regions is not problematic at subthreshold voltages because the channel doping region also has a high resistance at subthreshold voltages. Consequently, the present FET has low capacitance and high speed and is particularly well suited for operation in the subthreshold regime.
Claims18
A field effect transistor comprising:
- a) a channel doping region;
- b) a gate insulator disposed above the channel doping region;
- c) a gate electrode disposed above the gate insulator;
- and
- d) at least one underlap region adjacent to the channel doping region positioned between either a source extension or a drain extension and said channel doping region which does not underlap the boundaries of the gate electrode, wherein either
- a resistance of said underlap region is no more 30% of an ON-state resistance of said channel doping region, or
- the underlap region has a doping level no more than 1×1017/cc over a lateral thickness equal to or greater than a thickness of the gate insulator.
An electronic circuit, comprising:
- a) at least one field effect transistor comprising:
- a channel doping region;
- a gate insulator disposed above the channel doping region;
- a gate electrode disposed above the gate insulator;
- at least one underlap region adjacent to the channel doping region positioned between either a source extension or a drain extension and said channel doping region which does not underlap the boundaries of the gate electrode, wherein either
- a resistance of said underlap region is no more than 30% of an ON-state resistance of said channel doping region, or
- the underlap region has a doping level no more than 1×17/cc over a lateral thickness equal to or greater than a thickness of the gate insulator;
- and
- b) a voltage supply operable for providing voltage to the field effect transistor so that the field effect transistor is operated with a gate voltage of less than about 130% of a threshold voltage.
Dependencies are inferred from the claim text.