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US 7,009,261 B2Granted
Semiconductor device and method of manufacturing the same
AssigneeRenesas Technology Corp.
InventorTakashi Nakashima
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a p−-silicon substrate, n−-epitaxial growth layers on the p−-silicon substrate, a field insulating film at the surface of the n−-epitaxial growth layer, an npn transistor formed at the n−-epitaxial growth layer, an pnp transistor formed at the n−-epitaxial growth layer, a DMOS transistor on the n−-epitaxial growth layer, and a resistance. The DMOS transistor includes an n+-diffusion layer forming a source, a p-type diffusion layer forming a back gate region, a lightly doped n-type diffusion layer forming a drain, and a heavily doped n+-diffusion layer forming the drain.
Claims11
A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type;
- a semiconductor layer of a second conductivity type formed on said semiconductor substrate;
- a field insulating film formed selectively on a surface of said semiconductor layer;
- an element isolating region of the first conductivity type extending from the surface of said semiconductor layer to said semiconductor substrate, and isolating each of elements;
- a gate electrode of a DMOS (Double-Diffused Metal Oxide Semiconductor) transistor formed on said semiconductor layer with a gate insulating film therebetween;
- a well region of the first conductivity type formed at the surface of said semiconductor layer, and extending from a source side of said DMOS transistor to a position under said gate electrode;
- a first impurity diffusion layer of the first conductivity type formed at the surface of said semiconductor layer, and functioning as a base of a first bipolar transistor;
- a second impurity diffusion layer of the first conductivity type formed at the surface of said semiconductor layer, and functioning as a resistance;
- third and fourth impurity diffusion layers of the first conductivity type formed at the surface of said semiconductor layer, and functioning as an emitter and a collector of a second bipolar transistor;
- a fifth impurity diffusion layer of the first conductivity type formed at a surface of said well region, and functioning as a back gate region of said DMOS transistor;
- a sixth impurity diffusion layer formed at the surface of said semiconductor layer, functioning as a drain of said DMOS transistor, and having a lightly doped region containing impurities of the second conductivity type at a relatively low concentration and a first heavily doped region containing impurities of the second conductivity type at a relatively high concentration;
- seventh and eighth impurity diffusion layers of the second conductivity type formed at the surface of said semiconductor layer, and functioning as emitter- and collector-leading layers of said first bipolar transistor;
- a ninth impurity diffusion layer of the second conductivity type formed at the surface of said semiconductor layer, and functioning as a base-leading layer of the second bipolar transistor;
- and
- a tenth impurity diffusion layer formed at the surface of said well region, functioning as a source of said DMOS transistor, and formed of a second heavily doped region containing impurities of the second conductivity type at a concentration similar to the concentration of said first heavily doped region.
12 more elements
A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type;
- a semiconductor layer of a second conductivity type formed on said semiconductor substrate with an insulating film therebetween;
- a field insulating film formed selectively on a surface of said semiconductor layer;
- an element isolating region extending from a surface of said semiconductor layer to said semiconductor substrate, and isolating each of elements;
- a compound semiconductor layer of the first conductivity type extending through said semiconductor layer to said insulating film, and containing a combination of silicon and germanium (Ge) or a combination of silicon, germanium and carbon;
- a gate electrode of a DMOS (Double-Diffused Metal Oxide Semiconductor) transistor formed on said compound semiconductor layer with a gate insulating film therebetween;
- a first impurity diffusion layer of the first conductivity type formed at the surface of said semiconductor layer, and functioning as a base of a first bipolar transistor;
- a second impurity diffusion layer of the first conductivity type formed at the surface of said semiconductor layer, and functioning as a resistance;
- third and fourth impurity diffusion layers of the first conductivity type formed at the surface of said semiconductor layer, and functioning as an emitter and a collector of a second bipolar transistor;
- a fifth impurity diffusion layer of the first conductivity type formed at the surface of said compound semiconductor layer, and functioning as a back gate region of said DMOS transistor;
- a sixth impurity diffusion layer formed at the surface of said semiconductor layer, functioning as a drain of said DMOS transistor, and having a lightly doped region containing impurities of the second conductivity type at a relatively low concentration and a first heavily doped region containing impurities of the second conductivity type at a relatively high concentration;
- seventh and eighth impurity diffusion layers of the second conductivity type formed at the surface of said semiconductor layer, and functioning as emitter- and collector-leading layers of said first bipolar transistor;
- a ninth impurity diffusion layer of the second conductivity type formed at the surface of said semiconductor layer, and functioning as a base-leading layer of the second bipolar transistor;
- and
- a tenth impurity diffusion layer formed at the surface of said compound semiconductor layer, functioning as a source of said DMOS transistor, and formed of a second heavily doped region containing impurities of the second conductivity type at a concentration similar to that of said first heavily doped region.
12 more elements
A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type;
- a semiconductor layer of a second conductivity type formed on said semiconductor substrate with an insulating film therebetween;
- a field insulating film formed selectively on a surface of said semiconductor layer;
- an element isolating region extending from a surface of said semiconductor layer to said semiconductor substrate, and isolating each of elements;
- a first compound semiconductor layer of the first conductivity type extending through said semiconductor layer to said insulating film, containing a combination of silicon and germanium (Ge) or a combination of silicon, germanium and carbon, and having a region to be used as a base of a first bipolar transistor;
- second and third compound semiconductor layers extending through said semiconductor layer to said insulating film, containing a combination of silicon and germanium (Ge) or a combination of silicon, germanium and carbon, and having regions to be used as an emitter and a collector of a second bipolar transistor;
- a fourth compound semiconductor layer extending through said semiconductor layer to said insulating film, containing a combination of silicon and germanium (Ge) or a combination of silicon, germanium and carbon, and having regions to be used as a channel region of a DMOS (Double-Diffused Metal Oxide Semiconductor) transistor and a region immediately under the channel region;
- a gate electrode of said DMOS transistor formed on said fourth compound semiconductor layer with a gate insulating film therebetween;
- a first impurity diffusion layer of the first conductivity type formed at the surface of said semiconductor layer, being in contact with a periphery of said first compound semiconductor layer, and functioning as a base-leading layer of said first bipolar transistor;
- a second impurity diffusion layer of the first conductivity type formed at the surface of said semiconductor layer, and functioning as a resistance;
- third and fourth impurity diffusion layers of said first conductivity type formed at surfaces of said second and third compound semiconductor layers, and functioning as emitter- and collector-leading layers of said second bipolar transistor;
- a fifth impurity diffusion layer of the first conductivity type formed at the surface of said fourth compound semiconductor layer, and functioning as a back gate region of said DMOS transistor;
- a sixth impurity diffusion layer formed at the surface of said semiconductor layer, functioning as a drain of said DMOS transistor, and having a lightly doped region containing impurities of the second conductivity type at a relatively low concentration and a first heavily doped region containing impurities of the second conductivity type at a relatively high concentration;
- seventh and eighth impurity diffusion layers of the second conductivity type formed at the surface of said semiconductor layer, and functioning as emitter- and collector-leading layers of said first bipolar transistor;
- a ninth impurity diffusion layer of the second conductivity type formed at the surface of said semiconductor layer, and functioning as a base-leading layer of the second bipolar transistor;
- and
- a tenth impurity diffusion layer formed at the surface of said fourth compound semiconductor layer, functioning as a source of said DMOS transistor, and formed of a second heavily doped region containing impurities of the second conductivity type at a concentration similar to that of said first heavily doped region.
14 more elements
Dependencies are inferred from the claim text.