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US 7,009,246 B2Granted
Semiconductor device
AssigneeHitachi, Ltd.
InventorsTakahiro Kawata, Shigeru Nakahara, Keiichi Higeta
Life of this patent
Estimating the term…
Abstract
To reduce the width of isolation between the first and second p channel MIS•FETs driven by different voltages, a first p channel MIS•FET driven by a first supply voltage and a second p channel MIS•FET driven by a second supply voltage higher than the first supply voltage are arranged in the same n well of the same semiconductor substrate, and the second supply voltage is supplied as a common well bias voltage to the n well.
Claims15
A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type;
- first, second, and third wells being each of a second conductivity type opposite to said first conductivity type and provided in said semiconductor substrate;
- a first field-effect transistor being of a first channel conductivity type and driven by a first supply voltage, and a second field-effect transistor driven by a second supply voltage larger in absolute value than said first supply voltage, the first and second transistors being arranged in said first well;
- a third field-effect transistor being of said first channel conductivity type and driven by said first supply voltage, the third transistor being arranged in said second well;
- a fourth field-effect transistor being of a first channel conductivity type and driven by said second supply voltage, the fourth transistor being arranged in said third well;
- a first isolation layer provided between said first and second field-effect transistors;
- and
- a second isolation layer provided between said first and second wells and between said second and third wells,
- wherein said second supply voltage is supplied to said first well,
- said first supply voltage is supplied to said second well,
- said second supply voltage is supplied to said third well, and
- said second isolation layer is wider than said first isolation layer.
9 more elements
A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type;
- first, second, and third buried wells being each of a second conductivity type opposite to said first conductivity type and provided in said semiconductor substrate;
- first, second, and third wells being each of a second conductivity type and provided so that they are respectively enclosed within said first, second, and third buried wells;
- a first field-effect transistor being of said first channel conductivity type and driven by a first supply voltage, and a second field-effect transistor being of said first channel conductivity type and driven by a second supply voltage larger in absolute value than said first supply voltage, the first and second transistors being provided in said first well;
- a third field-effect transistor being of said first channel conductivity type and driven by said first supply voltage, the third transistor being arranged in said second well;
- a fourth field-effect transistor of said first channel conductivity type and driven by said second supply voltage, the fourth transistor being arranged in said third well;
- a first isolation layer provided between said first and second field-effect transistors;
- and
- a second isolation layer provided between said first and second wells and between said second and third wells,
- wherein said second supply voltage is supplied to said first well,
- said first supply voltage is supplied to said second well,
- said second supply voltage is supplied to said third well, and
- said second isolation layer is wider than said first isolation layer.
10 more elements
A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type;
- a first buried well, being of a second conductivity type opposite to said first conductivity type and provided in said semiconductor substrate;
- a first well being of said second conductivity type and provided so that the first well is enclosed within said first buried well;
- a first field-effect transistor being of said first channel conductivity type and driven by a first supply voltage;
- and
- a second field-effect transistor being of said first channel conductivity type and driven by a second supply voltage larger in absolute value than said first supply voltage,
- wherein the first and second field-effect transistors are arranged in said first well, and
- wherein said second supply voltage is supplied to said first well.
5 more elements
A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type;
- a first buried well being of a second conductivity type opposite to said first conductivity type and provided in said semiconductor substrate;
- first and second wells being each of said second conductivity type and provided so that they are enclosed within said first buried well;
- third and fourth wells being each of said first conductivity type and provided so that they ate enclosed within said first buried well;
- a first field-effect transistor being of said first channel conductivity type and driven by a first supply voltage, the first transistor being arranged in said first well;
- a second field-effect transistor being of said first channel conductivity type and driven by a second supply voltage larger in absolute value than said first supply voltage, the second transistor being arranged in said second well;
- a third field-effect transistor being of said second channel conductivity type opposite to said first channel conductivity type, the third transistor being arranged in said third well;
- and
- a fourth field-effect transistor of said second channel conductivity type, the fourth transistor being arranged in said fourth well,
- wherein said second supply voltage is supplied to both said first and second wells.
7 more elements
A semiconductor device, comprising:
- a semiconductor substrate of a first conductivity type;
- a first buried well being of a second conductivity type opposite to the first conductivity type and provided in said semiconductor substrate;
- first and second wells being each of said second conductivity type and provided so that they are enclosed within said first buried well;
- a third well being of said first conductivity type and provided between said first and second wells so that the third well is enclosed within said first buried well;
- a first field-effect transistor being of said first channel conductivity type and driven by a first supply voltages the first transistor being arranged in said first well;
- a second field-effect transistor being of said first channel conductivity type and driven by a second supply voltage larger in absolute value than said first supply voltage, the second transistor being arranged in said second well;
- and
- a third field-effect transistor of said second channel conductivity type opposite to said first channel conductivity type, the third transistor being arranged in said third well,
- wherein said second supply voltage is supplied to both of said first and second wells.
6 more elements
Dependencies are inferred from the claim text.