Semiconductor integrated circuit device including dummy patterns located to reduce dishing
AssigneesHitachi ULSI System Co., Ltd., Renesas Technology Corp.
InventorsHiroyuki Uchiyama, Hiraku Chakihara, Teruhisa Ichise, Michimoto Kaminaga
Life of this patent
Estimating the term…
Abstract
A large area dummy pattern DL is formed in a layer underneath a target T2 region formed in a scribe region SR of a wafer. A small area dummy pattern in a lower layer and a small area dummy pattern Ds2 in an upper layer are disposed in a region where the inter-pattern space of a pattern (active regions L1, L2, L3, gate electrode 17), which functions as an element of a product region PR and scribe region SR, is wide. The small area dummy pattern Ds2 in the upper layer is offset by ½ pitch relative to the small area dummy pattern Ds in the lower layer.
Claims69
A semiconductor integrated circuit device comprising:
- a semiconductor substrate having a semiconductor element formed over a main surface of the semiconductor substrate;
- an isolation region formed on said semiconductor substrate;
- an active region formed on said semiconductor substrate, which is surrounded by said isolation region;
- and
- a conductive layer formed over said active region, wherein:
- said active region comprises a dummy active region,
- said conductive layer comprises a pattern used for optical pattern recognition, and
- said dummy active region is formed directly under the whole area of said pattern used for optical pattern recognition.
A semiconductor integrated circuit device comprising:
- a semiconductor substrate having a semiconductor element formed over a main surface of said semiconductor substrate;
- a first pattern formed on said main surface or on any layer over said main surface, wherein said first pattern comprises a dummy pattern;
- a second pattern formed over an upper layer of said first pattern, wherein said second pattern comprises a pattern used for optical pattern recognition;
- and
- means for preventing dishing of said semiconductor integrated circuit device in a whole area directly under the pattern used for optical pattern recognition.
A semiconductor integrated circuit device comprising:
- a semiconductor substrate having a first region and a second region;
- a MISFET having an active region and a gate electrode, formed in said first region;
- a plurality of grooves in said first and second regions;
- a plurality of first insulating films formed in said grooves in said first and second regions;
- a plurality of said conductors formed over said grooves in said second region, wherein said plurality of conductors are formed on the same level as a conductor forming said gate electrode in said first region;
- and
- a second insulating film formed over said conductors in said first and second regions,
- wherein said active region is formed between said adjacent grooves in said first region,
- wherein said plurality of conductors in said second region are isolated from each other,
- wherein said first and second insulating films are polished by a CMP method, and
- wherein areas located in said second region are surrounded by trenches in said second region and are disposed to be spaced apart from one another by a certain distance, and,
- said conductors in said second region are spaced apart from one another by said same certain distance.
A semiconductor integrated circuit device comprising:
- a groove formed in a semiconductor substrate and defining active regions and dummy regions,
- said dummy regions including a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of each of said second dummy regions;
- an element isolation insulating film filled in said groove by polishing an insulating film formed over said groove such that said element isolation insulating film serves as an element isolation region;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition,
- wherein said second dummy regions are formed at a product region and at a scribing region, and
- wherein said first dummy region is formed at said scribing region.
A semiconductor integrated circuit device comprising:
- a groove formed in a semiconductor substrate and defining active regions and dummy regions,
- said dummy regions including a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of each of said second dummy regions;
- an element isolation insulating film filled in said groove by polishing an insulating film formed over said groove such that said element isolation insulating film serves as an element isolation region;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition,
- wherein said first dummy region and said second dummy regions are formed at a scribing region.
A semiconductor integrated circuit device comprising:
- grooves formed in a semiconductor substrate and defining active regions and dummy regions,
- said dummy regions including a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of each of said second dummy regions;
- element isolation insulating films filled in said grooves by polishing an insulating film formed over said grooves such that said element isolation insulating films serve as element isolation regions;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition,
- wherein said second dummy regions are formed at a product region and at a scribing region, and
- wherein said first dummy region is formed at said scribing region.
A semiconductor integrated circuit device comprising:
- grooves formed in a semiconductor substrate and defining active regions and dummy regions,
- said dummy regions including a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of each of said second dummy regions;
- element isolation insulating films filled in said grooves by polishing an insulating film formed over said grooves such that said element isolation insulating films serve as an element isolation region;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition,
- wherein said first dummy region and second dummy regions are formed at a scribing region.
A semiconductor integrated circuit device comprising:
- a first groove and a second groove formed in a semiconductor substrate,
- said first groove defining a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of each of said second dummy regions;
- said second groove defining an active region;
- element isolation insulating films filled in said first groove and said second groove by polishing an insulating film formed over said first groove and said second groove;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition,
- wherein said first dummy region and said second dummy regions are formed at a scribing region.
A semiconductor integrated circuit device comprising:
- a first groove and a second groove formed in a semiconductor substrate,
- said first groove defining a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of each of said second dummy regions;
- said second groove defining an active region and third dummy regions;
- element isolation insulating films filled in said first groove and said second groove by polishing an insulating film formed over said groove and said second groove;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition,
- wherein said first dummy region and said second dummy regions are formed at a scribing region.
A semiconductor integrated circuit device comprising:
- a groove formed in a semiconductor substrate and defining active regions and a dummy region;
- an element isolation insulating film filled in said groove by polishing an insulating film formed over said groove such that said element isolation insulating film serves as an element isolation region;
- and
- a conductor pattern formed over said dummy region and used for optical pattern recognition,
- wherein said dummy region is formed at said scribing region, and
- wherein an area of said dummy region is larger than that of said conductor pattern such that the whole area of said conductor pattern is arranged over said dummy region.
A semiconductor integrated circuit device comprising:
- grooves formed in a semiconductor substrate and defining active regions and a dummy region;
- element isolation insulating films filled in said grooves by polishing an insulating film formed over said grooves such that said element isolation insulating films serve as element isolation regions;
- and
- a conductor pattern formed over said dummy region and used for optical pattern recognition,
- wherein said dummy region is formed at said scribing region, and
- wherein an area of said dummy region is larger than that of said conductor pattern such that the whole area of said conductor pattern is arranged over said dummy region.
A semiconductor integrated circuit device comprising:
- a first groove and a second groove formed in a semiconductor substrate,
- said first groove defining a dummy region;
- said second groove defining a active region;
- element isolation insulating films filled in said first groove and said second groove by polishing an insulating film formed over said first groove and said second groove;
- and
- a conductor pattern formed over said dummy region and used for optical pattern recognition,
- wherein said dummy region is formed at a scribing region, and
- wherein an area of said dummy region is larger than that of said conductor pattern such that the whole area of said conductor pattern is arranged over said dummy region.
A semiconductor integrated circuit device comprising:
- a first groove and a second groove formed in a semiconductor substrate,
- said first groove defining a dummy region;
- said second groove defining a active region;
- element isolation insulating films filled in said first groove and said second groove by polishing an insulating film formed over said first groove and said second groove;
- and
- a conductor pattern formed over said dummy region and used for optical pattern recognition,
- wherein said dummy region is formed at a scribing region.
A semiconductor integrated circuit device comprising:
- a groove formed in a semiconductor substrate and defining active regions and dummy regions,
- said dummy regions including a first dummy region and second dummy regions such that said first dummy region has a area greater than an area of said second dummy region;
- an element isolation insulating film filled in said groove by polishing an insulating film formed over said groove such that said element isolation insulating film serves as an element isolation region;
- and
- wherein said first dummy region and said second dummy regions are formed at a scribing region.
A semiconductor integrated circuit device comprising:
- a groove formed in a semiconductor substrate and defining active regions and dummy regions,
- said dummy regions including a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of said second dummy regions;
- an element isolation insulating film filled in said groove by polishing an insulating film formed over said groove such that said element isolation insulating film serves as an element isolation region;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition,
- wherein said second dummy regions are formed at a product region, and
- wherein said first dummy region is formed at a scribing region.
A semiconductor integrated circuit device comprising:
- a groove formed in a semiconductor substrate and defining active regions and dummy regions,
- said dummy regions including a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of said second dummy regions;
- an element isolation insulating film filled in said groove by polishing an insulating film formed over said groove such that said element isolation insulating film serves as an element isolation region;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition.
A semiconductor integrated circuit device comprising:
- grooves formed in a semiconductor substrate and defining active regions and dummy regions,
- said dummy regions including a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of said second dummy regions;
- element isolation insulating films filled in said grooves by polishing an insulating film formed over said grooves such that said element isolation insulating films serve as element isolation regions;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition,
- wherein said second dummy regions are formed at a product region, and
- wherein said first dummy region is formed at a scribing region.
A semiconductor integrated circuit device comprising:
- grooves formed in a semiconductor substrate and defining active regions and dummy regions,
- said dummy regions including a first dummy region and second dummy regions such that said first dummy region has an area greater than individual areas of said second dummy regions;
- element isolation insulating films filled in said grooves by polishing an insulating film formed over said grooves such that said element isolation insulating films serve as an element isolation region;
- and
- a conductor pattern formed over said first dummy region and used for optical pattern recognition.
Dependencies are inferred from the claim text.