Silicon-germanium mesa transistor

A method in the fabrication of a silicon-germanium mesa transistor in a semiconductor process flow, particularly in a process flow designed for a bipolar integrated circuit for radio frequency applications, comprising by the steps of:

• providing a p-type doped silicon bulk substrate having an n+-type doped surface region being a subcollector for the mesa transistor;
• depositing epitaxially thereon a silicon layer comprising n-type dopant;
• depositing epitaxially thereon a silicon layer comprising germanium and p-type dopant;
• forming in said n-type and p-type epitaxial layers field isolation areas around, in a horizontal plane, a portion of said epitaxial layers to simultaneously define an n-type doped collector region for the mesa transistor on the subcollector;
• a p-type doped base region for the mesa transistor thereon;
• and an n-type doped collector plug on the subcollector, but separated from the n-type doped collector region and the p-type doped base region;
• and
• thereafter forming in said p-type doped base region an n-type doped emitter region for the mesa transistor.